Good questions. I have been researching this topic myself recently, and will try to provide some brief answers here.
what exactly is TMDS vs LDVS?
LVDS (low-voltage differential signaling) is simply an electrical specification for a differential signaling interface, while TMDS (transition-minimized differential signaling) is both an electrical specification AND a specific 8b/10b encoding scheme. Unfortunately, the electrical specifications are not directly compatible, although there are various ways to "adapt" one to the other under certain circumstances.
Electrically, LVDS uses totem-pole drivers and differential termination (100-120Ω), while TMDS uses CML (current-mode logic) open-collector drivers and individual 50Ω terminations to +3.3V. The Spartan-3E IOBs do not directly support CML.
Then there's the question of TMDS coding. The Spartan-3E IOBs have support for DDR, with data rates up to 628 Mb/s, but no dedicated high-speed SERDES logic. You would have to do the TMDS encoding and decoding in the FPGA fabric, using the DDR support in the IOBs to get the final bitstreams. This would limit you to pixel rates of 62.8 Mp/s or less.
In a practical sense, I am wondering if I can simply wire an HDMI breakout board directly to the input pins of my FPGA, configure those pins to the LVDS IO standard and expect it to work
No, not on the input side, at least not without some effort to terminate the TMDS properly and then AC-couple it with proper bias to the LVDS receivers on the FPGA (all of this while maintaining an accurate 100Ω differential impedance). Note that the sample projects you link to are all output-only examples. Driving DVI/HDMI from an LVDS output seems to be much more forgiving; they don't seem to have added any bias or termination resistors to their PCBs.
Your best bet would be to use external DVI/HDMI input and output chips, and make the connection to the FPGA via their parallel buses. I have used Analog Devices parts in the past.
Best Answer
Yes. In a lot of ways, DVI and HDMI look like a lightly digitized version of an analog VGA signal -- the entire image is transferred for every frame, and they even have horizontal and vertical blanking periods. (In HDMI, these blanking periods are used to transfer audio data.)
Most LCD displays will have an internal buffer which is used when displaying a signal at a different resolution than the panel (i.e, scaling), or on televisions which perform frame interpolation or other image processing.
But no, there is no inter-frame compression currently used in digital display technologies. Some newer revisions of HDMI and DisplayPort use DSC (Display Stream Compression) at very high resolutions, but even that is an intra-frame compression technique -- each frame can still be decoded on its own.