Electronic – Dual SPI master control

gpiomicroprocessorspi

I'm looking at a dual master spi interface, it needs to run at 20MHz which means push-pull for me.
My main concern is the output current of microprocessors, I could easily exceed the absolute maximum current rating if a software engineer decided to set one output high and the other one low on the microprocessor if they were set up as push-pull.

Open drain isn't going to work because of the 20MHz requirement and the amount of capacitance I have on my GPIO's. So my question is what circuit do I use to select between two dual masters?

schematic

simulate this circuit – Schematic created using CircuitLab

Best Answer

A 4-way unidirectional digital multiplexer would do the trick. You can use a 74244 to produce this function (74HCT244 for 5 V logic, 74LVC244 for 3.3 V). It contains two tristate 4-bit buffers (see below).

74244

(Sorry, unable to draw a schematic at present.)

Each master can have a 4-bit channel. Each master's SCK, MOSI and /CS drive the 1A or 2A buffer inputs with MISO taken a 1Y or 2Y buffer output. The other side of the channel buffers are connected to your SPI slave. Don't forget to put a 10 K pull-up on the slave's /CS. The slave's SCK also needs a 10 K pull-up or pull-down to pull it to its idle state, depending on your SPI mode used.

Connect /1OE to a select signal and /2OE to the inverse of the select signal. You can then switch between the two masters using select.