Electronic – Exchange instruction of 8085 microprocessor

Instructions are made up of a variable number of "words" and those words are made up of bits. In the case of the 8085 architecture, you can have instructions that are one, two, or three words long, and each word is 8-bits. Those bits are divided up into fields based on your instruction set. What fields there are and what those fields mean is usually contextually sensitive based on the value of one field that always has the same meaning. Typically this field is referred to as the "op code." You should read in detail at least chapter 8 of the linked pdf to get a thorough understanding.

In the case of instructions that operate on registers and store their results in a register, the source and target registers need to be identified in some fields in the instruction. In the case of an instruction that adds a constant to a register and stores the result in a register, the registers still need to be identified, but the constant also needs to be encoded in the instruction in its own field. In instruction set architectures, the term "immediate" is often used to mean a "constant value." In case of instructions that read from or write to memory, the location in memory may have to be encoded within the instruction.

That's the basic idea, hope this helps. For future reference, a good search term for questions like this is "Instruction Set Architecture" for your processor.

Edit Re: STA 4200

The STA instruction is described on page 3-61 (pg 117) of this Assembly Language Programming guide for 8080/8085 processors.The three bytes are:

• Byte 1 = OpCode (00110010)
• Byte 2 = Low Address Byte
• Byte 3 = High Address Byte

STA is the "Store Accumulator Direct" instruction, and what it does is copies the value of the Accumulator into memory at the 16-bit address composed from Bytes 2 and 3.

When you enable an interrupt on one of the 8085's RST5.5, RST6.5 or RST7.5 pins you will get behavior as follows:

RST5.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 2Ch (hexadecimal) address.

RST6.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 34h (hexadecimal) address.

RST7.5 is a maskable interrupt. When this interrupt is received the processor saves the contents of the PC register into stack and branches to 3Ch (hexadecimal) address.

So you sort out which one caused the interrupt based on where the code execution flow branches.