I am researching exotic semiconductors for a digital ASIC with a few million logic gates which should run as fast as possible within a $30 million budget. (Specifically, I need to do a single fully-parallel 4096-bit multiplication repeatedly. For more context, I am building an ASIC to compute this Verifiable Delay Function.)
It seems there are semiconductors that perform better than silicon in terms of speed of logic operations, including gallium arsenide, gallium nitride and indium phosphide. My research suggests that these semiconductors are generally used for analogue ASICs as opposed to digital logic, so it is hard to tell which semiconductors are viable for my use case.
Which semiconductor is viable for a digital ASIC with millions of logic gates (say, ~20 million gates) and can provide the fastest performance in terms of speed of logical gates?
Edits in response to comments
- Budget: Our maximum budget is in the tens of millions of dollars, ~$30 million.
- Speed: To quantify the speed, we ideally need someone spending $1 billion to be at most 2x faster than us. Notice the Verifiable Delay Function (VDF) is inherently sequential, so lots of parallelism does not help.
- SiGe process technology: I understood GaAs can give a significant speed bump with respect to SiGe. If 100nm GaAs is faster than 7nm SiGe then size of SiGe is not relevant. As for GaAs, we're only looking to use existing process technology.
- Pins: We do not need a large number of pins. The reason is there is a single 4096-bit input and a single 4096-bit output per VDF run with 10 minutes of intermediary repeated multiplications spanning 10 minutes. The I/O speed is marginal compared to the multiplication speed.
- Power and cooling: The ASIC should be runnable by individuals without power supply and cooling that is much more sophisticated than a top-of-the-range GPU.
- Graphics technology: As I understand, graphics technology is optimised for massively parallel computation. The ASIC we want needs to be optimised for speed of sequential computation, i.e. latency.
- Obfuscation/reverse engineering: The ASIC will be developed for an open-source project (namely, Ethereum). The ASIC will itself have an open-source circuit design.
- More context: See these slides that explain the use of the ASIC for a blockchain random number generator.
Best Answer
I'll bet that you don't want raw speed, but speed per dollar, and operations per Joule. In which case, silicon CMOS, because of the huge investment in it, is the 500lb gorilla you should go with.