Electronic – Flash IC/ CMOS RAM/ microSD in TFT LCD

The Renesas R61581 is an intelligent display controller that handles all of the high bandwidth tasks needed to refresh the display. The control interface allows a microcontroller to send commands and data to load the in-built video RAM. It is an ideal choice to drive with a medium scale microcontroller.

The datasheet can be downloaded here.

Much of the datasheet refers to connecting the controller to the LCD glass, which you won't need to worry about. The controller has a multitude of host (microcontroller) interface options, but the simplest and easiest way to start is probably by configuring it for 8-bit parallel data access (so long as the display gives you access to the IM pins to set this up, otherwise use what's provided by the display interface). The datasheet includes a comprehensive command reference.

When you can initialise the controller and write a few pixels, then you're up and running and can develop your graphics code incrementally.

Have fun!

This depends on the device.

RAM can be built faster than Flash; this starts to become important in about the 100MHz range.

Simple microcontrollers

Small slow microcontrollers execute directly out of Flash. These systems usually have more Flash than SRAM too.

Midrange systems

Once your device gets faster then the situation is a little different. Midrange ARM systems may do that as well, or they may have a mask ROM bootloader that does something smarter: perhaps downloading code from USB or external EEPROMs into internal SRAM.

Large systems

Larger, faster systems will have external DRAM and external Flash. This is typical of a mobile phone architecture. At this point, there is plenty of RAM available and it's faster than the Flash, so the bootloader will copy and execute it. This may involve shovelling it through the CPU registers or it may involve a DMA transfer if a DMA unit is available.

Harvard architectures are typically small so don't bother with the copying phase. I've seen an ARM with "hybrid harvard", which is a single address space containing various memories but two different fetch units. Code and data can be fetched in parallel, as long as they are not from the same memory. So you could fetch code from Flash and data from SRAM, or code from SRAM and data from DRAM etc.