Electronic – free/low-cost bus monitor in VHDL/Verilog for ARM AXI/AXI4 and/or AXI4-Stream protocols

armhdl

I am looking for something to log the read and writes on an AXI 4 bus to a file. And similar for AXI4-Stream. For what it is worth, this is for Xilinx. I could roll my own, but I hoped someone else had already solved this problem.

Best Answer

Does the Xilinx AXI Bus functional model help?

http://www.xilinx.com/ipcenter/axi4.htm has a link to an AXI BFM Product Brief