We know that using T-Flip Flops in a cascaded manner(something like ripple counter) allows us to divide the clock frequency by a factor of \$2^{n}\$ where \$n\$ stands for the number of flip-flops. Now, Suppose I want to divide my original clock frequency by a factor of 3 or by 9? What can I do to achieve this?
My progress: Suppose we want to divide the given frequency by a factor of 6. Then, I thought that we can achieve our task by connecting the counter circuit and then adding some combinatorial circuit to change the clock only when 3 counts are done. This way whenever 6 counts are completed, one output cycle will complete.(Look at the circuit below):
But how do we do when we want to divide the clock frequency by a factor of 3 or 5 or 9?
Best Answer
Use added logic to capture counts as they appear at the binary counters outputs. The LSB is 1 if high. The weight of the bits is 1, 2, 4, 8 for a 4 bit counter. A count of 9 means 1 and 8 are high, 2 and 4 are low. Use and or nand gates on these pins to reset the counter each time it has a count of 9, or a count of 8 if asynchronous reset, as 0 is part of the count.
As long as the clock pulse is running it will repeat the same count endlessly.
Because 0 is part of the count, the counter will have one more state then the counters value.