Electronic – High Voltage PCB Design

high voltagepcb-designprotection

I want to design a 4 layer PCB with the following voltage levels. GND, 5V, 3.3V and 80V.
In the circuit there are some MOSFETs which are driven by 3.3V and MOSFET switch 80V (required current is very low uA level). Which makes overall on the pcb, there are 80V and 3.3V signals close to each other (At some places less than 20 mils).

For the protection I kept 80V at the bottom layer. And the other voltage levels and signals are on the top and second layer. And I keep the third layer completely ground.

I tried to represent the design with the simple picture below.

enter image description here

Now I am worrying about the DC break down voltage somewhere in my PCB. For such a circuit, where one different high and low voltage uses, I have not much experience. I am not sure about my structure, whether it is safe enough? Is there any article or source where I can find some useful information regarding to this issue.
Do you have any advice for such a PCB-design ?
If there is lack of information required for the question please ask.

Best Answer

High voltage clearance is a complex subject. Too many factors and standards to consider.

In your case, I'd follow the IPC-2221A "Generic Standard on Printed Board Circuit". According the table 6-1. "Electrical Conductor Spacing" for a 80V difference between conductors we have:

Internal layers --> 0.1mm (3.9 mils)

External layers uncoated -->0.6mm (24 mils)

External layers coated --> 0.13mm (5 mils)

IPC-2221A is a proprietary standard and I can´t reproduce the whole table here.

These numbers are not mandatory, they just stated a minimum clearance. I would use bigger numbers.

Note, as it´s said before, the high power vias. They should keep the clearance in the "low voltage" side.

The stackup seems to me quite sensible but keep in mind the pins in the High power THT components. They should keep the clearance.