I need a split supply for a project I am working on and there's no way around it, however this is very unknown to me.
How does one even design one and how does it work? I find it confusing to do a KCL on it just so I can see the analysis but I am failing on that as well
The goal is use a 12VDC wall wart and split it into +/-6 V I would be really happy with that. It will not be driving anything heavy besides OP-AMPS and buffers.
Sample:
simulate this circuit – Schematic created using CircuitLab
This is the current problem Iam facing:
This is what I believe is the solution:
EDIT:
I am sorry the confusion I have laid on to people but here is my XY problem I am having.
Goal Design: To create an amplifier with auto gain control using the Arduino and a rheostat to achieve this.
How I achieved it: Firstly I had my audio signal going into the INPUT of the precision rectifier to convert the audio signal in a "DC Line" with a magnitude of the peak of the audio signal. From there I took the output of the precision rectifier and put it into A0 (Analog pin) of the Ardunio so it can read the value. From there I have the code that the Arduino executes that finds the suitable R2 value from the feedback equation of: (Gain = 1+ (R2/R1)), where Vout can be adjusted via code and Vin(Vp) was measured on the A0 line. Once found a R2 I do some basic R2/RS, where RS is the steps I had on the rheostat and then do some SPI stuff. The code then tells the rheostat (Which is in the NFB loop of the amplifier) To change the rheostat resistance and get the desired Vo regradless of Vin. All in terms of Voltage peaks
The flaw: I found a big flaw recently when I was doing some input/output Impedance stuff for some filtering for the output of the amp. I realized Depending on the Rs( Output impedance) of the output source (iphone or laptop) the Vin that the op – amp sees is a different Vin from the ardunio sees. I realized I should capture the Vs from the V+ terminal and not from the audio source. But the V+ node has a DC offset that is unwanted for the ardunio to read I guess.
Theoretical if this works, this can defy the source resistance and can be disregarded due to the rheostat compensating for the voltage loss due to the loading of the stages from the input.
EDIT: EDIT: My solution ? Will this work? Should Make node A the same voltage as Node B assuming 1khz at 0dB.
Best Answer
The actual problem is that you precision rectifier is measuring the negative cycle of your input waveform (which, by the simple fact that it seems to be somehow working must be an actual centered AC). During the positive cycle the opamp is saturated, not just by the presence of the diode but by the signal itself, this can be considered either a bug or a design feature in this case. By giving it a positive DC you have simply put it out of range.
You already have a split rail in your design. You created one for biasing node "A" at the input of the first opamp. You can do exactly the same thing for biasing the positive terminal of your super diode opamp, but this means that you will lose half your range as now the DC will determine your new minimum output value.
If, after you set your mid-supply bias, you AC-couple your super-diode it will work and behave as it should, but now the negative cycle of your input waveform defines the bias point of the op amp and keeps it saturated. This is what is known as a DC-recovery circuit. However, this bias point is the same as the rectified value.
The only thing missing, after AC-coupling, is to provide a discharge path for the output capacitor when the OP amp is saturated. You can do this by adding a resistor to ground in either the input or the output of the super diode.
But BTW: the way that AGC circuits normally work is by looking at the peak output of your amplified signal and trying to keep it constant. That is, setting the gain via a feedback algorithm not a feedforward one.