Electronic – How Is Context Switching Done In Hardware

computer-architecture

I have a question about how process state would be saved during a context switch.

Given a relatively simple design for a CPU using von Neumann style architecture, how is the process image saved without overriding some of that state in the process?

For example, if I want to save the current state of all registers including the program and memory address registers, how can I write them to a memory location without overriding the stack and base pointers in the process?

Is there auxiliary hardware that holds intermediate values, and if so what does it look like in a more simple sense compared to the industry standard?

Best Answer

Both options exist, of dedicated hardware and general-purpose approaches.

X86 real mode (see description) uses the currently setup stack to push FLAGS, followed by CS, then IP.

The iret instruction restores CS:IP and FLAGS, allowing the interrupted program to continue unaffected. For hardware interrupts, all other registers (including the general-purpose registers) must be explicitly preserved (e.g. if an interrupt routine makes use of AX, it should push AX when it begins and pop AX when it ends). It is good practice for software interrupts to preserve all registers except those containing return values.

Obviously this process changes the stack, but in a reversible way.

By contrast, ARM FIQ mode (see https://stackoverflow.com/questions/973933/what-is-the-difference-between-fiq-and-irq-interrupt-system ) has a set of banked registers. On entry to FIQ mode the processor automatically swaps to using the banked registers. This saves on memory accesses.

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