Recall that, for node voltage analysis, a floating voltage source (a voltage source that does not connect to the GND node) poses a problem since you cannot write an equation relating the current through to the voltage across.
What you must do then is enclose the floating voltage source in a supernode, which reduces the number of KCL equations by one, and add the equation relating the voltage difference between the nodes the voltage source is connected to.
Now, the dual of node voltage analysis is mesh current analysis and here we have the dual problem when we have a current source common to two meshes - we can't write an equation relating the current through to the voltage across a current source.
What must be done then is to form a supermesh which reduces the number of KVL equations by one and add the equation relating the difference of the mesh currents to the common current source.
So, write KVL counter-clockwise around the supermesh consisting of the two voltage sources and the two resistors
$$V_1 = I_aR_1 + V_2 + (I_b - I_c)R_2$$
You have, by inspection (no KVL required for this mesh - this is dual to no KCL required for the node connected to a non-floating voltage source)
$$I_c = -1.25A $$
You need one more equation which is the equation relating to difference of the two mesh currents with the common current source.
$$3A = I_a - I_b $$
Now, you have 3 independent equations and 3 unknowns.
Why is that Kirchhoff's voltage and current law always give answer?
They don't always give answer. For example:
simulate this circuit – Schematic created using CircuitLab
KVL applied to the above gives:
$$1V = 2V$$
which is a contradiction.
Another example:
simulate this circuit
KCL applied to the above gives:
$$1A = -2A$$
which is a contradiction.
Another example:
simulate this circuit
KCL applied to the above gives
$$\frac{V}{1 \Omega} = \frac{V}{1 \Omega}$$
so the voltage and current are undetermined.
The fact is, it is possible to draw an ideal circuit schematic that is inconsistent or has undetermined voltages or currents.
Furthermore, node voltage analysis relies on KCL while mesh current analysis relies on KVL so I don't quite understand the 2nd part of your question.
Best Answer
Whichever gives an easy set of equations. If you are doing resistor networks, count if there are more loops or more nodes. KVL if there are more loops, KCL if there are more nodes.
In more advanced circuits, like transistors, there is normally a very specific mode that lends itself to your problem space.