Electronic – How to improve this SMPS design

First comments:

1. Add a fuse. If the input polarity is accidentally reversed, your small diode near the input will clamp the input and burn.

2. It's not a good idea to tie your switch gates directly together when PWM driven, as the gate capacitances can interact with each other. For reasonably-low frequency power supply designs, this can be fixed with a small series resistor (10 ohms) close to each gate. Microsemi has an app note on parasitic gate oscillation that explains the issue quite well.

3. Ceramic capacitors should be derated 60-70% for voltage. (i.e. don't use 16V caps on a 12V output - use 25V). Also bear in mind that the dielectric material is important - X7R / X5R capacitors lose as much at 50% of their rated capacitance as their DC bias approaches the part rating. C0G and U2J dielectrics are largely immune from this. Kemet has an app note that mentions this (and other) gotchas with MLCCs.

4. The bottom of the IC (in MSOP, which is what your PCB appears to be using) has an exposed pad which should be connected to a large ground plane for thermal dissipation. This device doesn't have integrated MOSFETs, but the MOSFET drivers themselves dissipate power and need to be cooled. If you're not using the part with the exposed pad, you should be! It's always better to have more cooling than you may need. Since you're driving two MOSFETs, the driver will be doing a fair bit of work. (On your schematic, the exposed pad is a no-connect - it should be going to your bottom-side ground pour with vias at the pad).

5. From an EMI perspective, you've already done the most important thing of keeping your control circuitry away from your power paths. An isolated island for diode cooling shouldn't do bad things, since I don't see it appreciably changing any loop dimensions. A hard-switched buck is going to generate EMI no matter what you do, and your diode is going to be lossy. (If cost isn't a huge issue, the gains you get from a synchronous buck in terms of power loss in the lower switch vs. a diode are worth the extra investment.)

6. Make sure that your overcurrent shutdown limit is below the 4.1A maximum DC current that your output inductor can handle. I didn't reverse any of your calculations to figure this out myself - too tired this morning :)

7. You really should have some sort of output overvoltage protection. Ideally you want an SCR crowbar, in case you have a series MOSFET failure. The SCR clamps the DC input and blows the fuse (which you need to add per #1) while preventing your downstream components from all blowing up / catching fire due to receiving 9-15V instead of 5V. Also it protects you if your feedback goes open-loop (missing or bad part, bad soldering, etc.)

Yes, there are stability issues and a brief moment when both FETs are on but the beauty of using a FET on the pull-down part of the circuit (i.e. a synchronous buck converter) instead of a schottky diode is this: -

1. Whatever duty cycle your PWM is the output voltage stays constant as a fraction of input voltage - you are in effect using the L and C on the output as a low pass filter to a square wave input.
2. Whatever load you have connected, providing the FETs are lowish on resistance, within reason you don't need to change the PWM mark-space ratio.
3. It will be more efficient on heavier loads than a non-synchronous buck regulator but the down-side is that on light loads it will be less efficient because you need current to drive the N channel FET because of gate capacitance.

I'd also advocate building a 555 timer sawtooth generator as the basis of your system. Something like this: -

I'd then feed it into a fast comparator and then the use the comparator output to drive the two FETs. The two FETs can be "time segregated" with a small RC time delay on the output of the comparator - the undelayed output and the delayed output would feed an AND gate for one of the gate drives and the the same for the other gate drive but using a NOR gate. Plan on maybe 50ns time delay introduced.

What you get is a half-decent synchronous buck convertor that just needs an input to the other comparator input to get the required duty cycle changes. OK so far? Then you can apply a simple control loop that lowers the 2nd input to the comparator as the input voltage gets bigger. Get this working and then apply another small control loop that actually regulates the PWM with load current changes a tad and this would probably work and no negative feedback involved.

Then, as the final touch, and with care and subtlety apply an overall control loop to keep the output better stabilized but remember, with a sync buck you can pretty much get half-decent stable performance without control loops that use negative feedback - if you are wanting to go this approach I can recommend it.

However, for me, I'd just call on Linear Technology and get the device that already does the job.