I need to design a 10/100/1000 BASE-T “backplane” board that contains multiple PHY outputs from Ethernet controller chips. On the board ,the LAN specifications are very strict in regard to how the LAN silicon(PHY) is situated to the magnetics and the RJ-45 connectors. My questions are primarily how to interface to an off the board RJ-45 patch panel that could be anywhere from ~2” to 28” away. Various forums have “addressed” this in the past, such as “For remoting 1000Base-T Ethernet connector, is it better to remote PHY from magnetics or magnetics from connector?”. One opinion is to place magnetics close to the PHY and remote the connector. Another opinion is to put the magnetics close to the connector, remoting the PHY.
Which of the two, remote the connector or remote the PHY, is “correct”/ easier to implement for maintaining signal integrity and minimizing EMI?
What is the maximum length that is possible to remote the PHY or the connector?
Do I have to run the long lengths off the board?
How does a 48 or 96 port gigabit switch run their signals while maintaining signal integrity?
Are there any definite specs on how to proceed? Thanks in advance.
Best Answer
The answers to the previous question you referenced, give some strategies but do not ground and/or not light the conditions in those that strategies are useful. Therefore, the short answer to your question: it depends.
The long answer is the following:
Scenario A: you trace a two-layer PCB
On a two-layer PCB, it is too difficult (or simply impossible) to route impedance matched pairs, therefore place the phy, mag, and jack as close as possible to make that traces short as possible but also keeping wires lengths matched within pairs at least.
Scenario B: you trace a four or more layer PCB
On an at least four-layer PCB, it is simple to organize the corresponding reference planes and there are two sub-scenarios here:
1) If you (can) organize AGND reference plane only, than only phy-mag pairs can be traced impedance matched, therefore you must keep the mag-rj45 distance as short as possible. (Keeping the lengths matched is also mandatory here.)
2) If you (can) organize both AGND between phy-mag traces and (let's call it so) MGND between mag-rj45 traces, than you can trace all the pairs impedance&lengths matched. But you must be aware that each mag-rj45 path must have its separate reference plane, rather than AGND that can be shared.
Some tips on how to do MGND is shown below.
Now, on your sub-questions:
IMO, Scenario B1 is preferred, because tracing many pairs (including many pairs of many phys) with respect to one reference is simpler than what is needed to do in other cases.
Without a reference, up to one inch limit is recommended. With a reference, it can be much longer.
It depends on your construction. Running on a PCB, use at least the approaches shown above.
They use many approaches, mostly including (but not limited to) shown above.
Maybe, but i think they all are case dependent.
Good luck.