Electronic – In an SDRAM how do address rows/columns and rank width and bank width relate to the total memory size


I have a Micron SDRAM (MT16KTF1G64HZ-8GB). The size of the memory is 8GB. I did some calucaltions and 8GB of data means 2^36 bits capacity. Now when I look in the Micron data sheet, the row address is 16 bits wide and the column address is 10 bits wide. That will give us a total of (2^16)*(2^10) bits which is 2^26 bits. But the memory width should be 2^36. How are the rest of the bits in the memory addressed?

The data sheet also mentions that this is a dual rank memory. Does this mean that there are two sets of 2^26 bits? Even then, that would result in 2*(2^26)=2^27 bits. We're still not at 2^36 bits.

The data sheet also mentions that there are 8 device banks. Does this mean that each bank has 2^27 bits? But even then it would give us 2^30 bit. Still not at 2^36.

I'm really confused. Could someone please help me?

Best Answer

We're talking about an SODIMM module here. It has multiple chips on it, and has an overall format of 1G (230) locations of 64 (26) bits each. (Total of 236 bits.)

The module contains 16 (24) chips that contain 4G (232) bits each. (Total of 236 bits.)

The memory in each chip is organized as 8 (23) banks, each with 64K (216) rows and 1024 (210) columns of locations that contain 8 (23) bits each. (Total of 232 bits per chip.)