Below are two pictures of a portion of a PCB layout I did. The first shows the signal traces and the second shows the ground pour. U1 is an 8 MHz MCU, U3 an I2C sensor, U4 a RTC, and U2 a boosting power supply. The PCB is limited in size.
I don't have much experience in PCB layout, so there are probably a few fundamental flaws in the routing. It functions fine, though I can't comment on EMI. For VCC and GND I tried to use a gridded layout as much as possible, and add bypass caps as close as possible to the pins.
Now I'm trying to learn better PCB layout, e.g. signal return paths, reducing EMI, MCU having it's own little ground plane (Olin's answer), etc.
Can I achieve best practice layout on this fixed size PCB with 2 layers, or should I move to 4 layers?
Best Answer
It doesn't seem that a 4-layer board is strictly called for in this case. A 2-layer board would be sufficient.
There are no high speed signals on the board. I2C is not a high enough speed to worry.
The board will work in a low EMI environment. The level of EMI underwater is probably as low as it gets.
Other comments
Gridded layout (aka Manhattan routing) doesn't work as well for boards that have mostly SMT components, and many of them are quad-pack, and there's not a lot of spare real estate.
I would change the layout of the LTC3525 boost converter. It should look more like fig.3 in the datasheet. It's great that you have built and tested a batch of these devices. If you further improve the layout of the boost converter, you should have less EMI. That may lead to better readings from sensors.