Electronic – Why is the + sign commonly used as logic OR operator

Even a PLL isn't going to preserve the waveform (including duty cycle) of its reference input, unless you add a second circuit to it to specifically do that. For example, the PLL could drive a one-shot whose pulse width is controlled by a feedback loop that compares the output duty cycle with the input duty cycle.

The best way to do this in an all-digital manner is to have one circuit that measures the frequency and duty cycle of the input signal (if those are the only two parameters you care about), and have another circuit that synthesizes a new signal with the same duty cycle and the desired frequency based on those measured values. (I have done something like this myself when building FPGAs that need to do frame rate doubling/halving on video signals.)

The output signal will in most cases be an approximation of the signal you actually want, and you'll have to decide how good that approximation needs to be.

First of all, these are the steps you should follow in order to solve for SOP:

1. Write AND terms for each input combination which produce HIGH output.
2. Write the input variable if it is 1, and write the complement if the variable value is 0.
3. OR the AND terms to obtain the output function. In other words, add the AND terms together to produce your wanted output function.
4. SOP will have this form from the truth table given in the question: $$F = \overline{A}BC + A\overline{B}C + AB\overline{C} + ABC$$

The first term: $$\overline{A}BC$$ A is equal to 0 in the truth table when output F is equal to 1. The second term: $$A\overline{B}C$$ B is equal to 0 in the truth table when output F is equal to 1. The third term: $$AB\overline{C}$$ C is equal to 0 in the truth table when output F is equal to 1. The fourth term: $$ABC$$ A, B, C are all equal to 1 in the truth table when output F is equal to 1.

Secondly, these are the steps you should follow in order to solve for POS:

1. Write OR terms when the output F is equal to 0.
2. Write the input variable (A, B, C) if the value is zero, and write the complement if the input is 1.
3. AND the OR terms to obtain the output function. In other words, multiple the OR terms together to get the final output logic equation.
4. POS will have this form from the truth table given in the question: $$F=(A+B+C)(A+B+\overline{C})(A+\overline{B}+C)(\overline{A} + B + C)$$

The first term: $$(A+B+C)$$ A, B, and C are equal to zero and the output F is equal to zero as well. The second term: $$(A+B+\overline{C})$$ Output F is equal to zero but C is equal to 1. Hence why we take complement. The third term: $$(A+\overline{B}+C)$$ Output F is equal to zero but B is equal to 1. Hence why we take complement. The fourth term: $$(\overline{A}+B+C)$$ Output F is equal to zero but A is equal to 1. Hence why we take complement.

Essentially, you have to follow the three first steps in order to successfully for SOP and POS. You could have a lot more terms depending on your output results or the number of inputs you have.

Note that the results shown above are not in the reduced format. You could potentially reduce those Boolean-logic equations much more.