in my experience having truly separate AGND and DGND nets almost never works out well in practice. 90% of the designs i see that try to do this end up with current loops that introduce EMI issues and can generate more noise in the analog portions of the circuit than using a single ground with careful part placement would.
Having two GND planes also creates a problem for routing in that signals referenced to a particular ground should only ever be run on layers that are adjacent to this plane or its associate power plane. This can result is a pretty funky stack up that can limit where you can run traces. Your best answer would be AGND,signal,?GND,POWER,signal,DGND but thats funky to layout, uses lots of vias, only gives 2 signal layers to route on.
What i would recommend is a single solid ground plane and careful part placement. High speed digital signals and noise will follow the path of least inductance to ground not the path of least resistance. The path of least inductance is the smallest loop area, for signals this is directly under the trace on the adjacent ground plane. In some cases a ground pour on top, bottom, or both can be helpful in reducing noise pick up as well. This is dependent on the components and the design layout.
Create virtual partitions, keep out areas, where you only run either analog or digital signals, keeping in mind that the return current path for the low frequency analog signals is the path of least resistance, while the return path for the high speed digital signals is the path of least inductance. As long as your careful to ensure that the return current paths don't cross, especially a digital return running under your analog sections. You shouldn't get much noise pick up at all.
If your have a particular device that is very sensitive to noise, such as a high resolution ADC, you can use a ground island to increase noise immunity, like this:
alt text http://www.hottconsultants.com/techtips/a-d%20gnd%20plane.gif
In cases where i have some sensitive analog circuitry i will usually also use a power island that is separated from the digital power supply by an LC filter of some sort, depending on the digital frequencies i'm wishing to block.
First, thicken up the power traces to make absolutely sure that (if life gets interesting) fuses will blow or breakers will pop rather than your PCB traces vapourising. In my opinion a 0.25 inch track width is not too much.
Second, space out the traces to get at least 0.25" between live and neutral, and a bit more (0.5" if you can) between either and any other circuitry. This is an ideal; if a component forces less clearance, do what you have to do.
And I would prefer a bit more clearance rather than copper pour. But if the board is huge, I would consider a copper pour in areas more than 0.5 or 1 inch from mains circuitry.
There is no justification for such large clearances in the PCB materials themselves; I have seen guidelines that say 5mm is adequate. But as boards age, there may be contaminants... I have seen one board that would have survived longer if its live to signal clearances had been bigger than a large (carbonised) ant!
Best Answer
This is information you get from the datasheet of the prepreg/laminate you use. Example here from Isola: http://www.isola-group.com/wp-content/uploads/2012/09/IS420-Lead%C2%ADfree-Laminate-and-Prepreg-Data-Sheet-Isola.pdf
This specific material datasheet show something like 30 kV isolation per mm material layer to layer.
If you rely on this, make sure the material is fully specified in the PCB fab drawing.
Also note you can pretty much count on the laminate thickness, but the Cu traces will sink into the prepreg effectively reducing the resulting layer to layer distance.