Electronic – MOSFET current mirror: Saturation mode

current-mirrormosfet

I have some trouble understanding why M1 is in saturation/active mode.

Circuit

According to Wikipedia a MOSFET is in saturation mode if \$V_{GS} > V_{th}\$ and \$V_{DS} \ge (V_{GS} – V_{th})\$.

However as drain and gate are tied together \$\implies V_{DG} = 0 \implies V_{DS} = V_{GS}\$. Therefore \$V_{DS} \ge (V_{GS} – V_{th})\$ can't be true (\$V_{th} > 0\$)? What am I missing?

Best Answer

If \$V_{GS}=V_{DS}\$, and \$V_T>0\$, you can change the saturation requirements of \$V_{DS}\ge V_{GS}-V_T\$ to \$V_{DS}\ge V_{DS}-V_T\$. Subtracting \$V_{DS}\$ from both sides gives you \$0\ge-V_T\$, which can also be written as \$V_T\ge0\$. This is why this configuration is always in saturation as long as you meet the other saturation criteria of \$V_{GS}>V_T\$.