Electronic – the use of the line connecting drain and gate in current mirror using voltage bias

In your first circuit, it's uncertain what output current you'll get for a given input voltage. First, because if you build this circuit on several chips, the PMOS behavior will not be identical from chip to chip. Also because as the temperature chagnes the PMOS device behavior will change.

In the second circuit, you know the output current will be essentially identical to the input current, regardless of variation of the MOSFET performance. The trick then is just to make a current source for the input that is insensitive to process and temperature variations.

To figure out \$V_{GS}\$, all you need is the MOSFET current equation. You have all the parameters you need for that, and you did the calculation correctly:

$$I_D = \frac12 k' \frac WL (V_{GS} - V_t)^2$$

$$250 \mathrm{\mu A} = \frac12 \left(80 \mathrm{\frac{\mu A}{V^2}}\right)(3)(V_{GS} - 1 \mathrm V)^2$$

$$V_{GS} \approx 2.44 \mathrm V$$

Now, if you want, you can use KVL to figure out the other voltages in the left branch of the circuit:

^{simulate this circuit – Schematic created using CircuitLab}

$$5\mathrm{V} - V_{C} - V_{GS} - -5\mathrm{V} = 0$$

where \$V_C\$ is the voltage across the current source. You can plug in your \$V_{GS}\$ to get:

$$5\mathrm{V} - V_C - 2.44\mathrm{V} - -5\mathrm{V} = 0$$

$$V_C \approx 7.56\mathrm{V}$$

Normally you don't need to figure out the voltage across the current source for a homework problem. (In real life, you need to make sure you have enough voltage, especially for more complex circuits like a Wilson current mirror.) You might have to find the voltage across the output transistor, since that will let you take channel length modulation into account and determine the error of the mirror.