This is regarding thermal properties of MOSFETs. Most data sheets show a property called Rj (thermal resistance) measured in C/W (celcius per watt). Suppose I want to derate power in MOSFET ,in order to get W/C, is it the reciprocal of C/W ? Is such a relationship so straightforward ?
Electronic – MOSFET thermal derating
mosfet
Related Solutions
There are many losses associated with switching, but it sounds like you are most concerned about the additional thermal load introduced into the MOSFETs in the period transitioning between on and off. I thought it would be easy to find some application notes on this, but surprisingly it wasn't. The best I found was AN-6005 Synchronous buck MOSFET loss calculations with Excel model from Fairchild, the relevant parts of which I'll summarize here.
During the switching transition, the voltage and current in the MOSFET will look approximately like this:
The switching losses we are going to calculate are those in periods \$t2\$ and \$t3\$ due to the voltage and current in the MOSFET. The way to approach this is to calculate the energy of each transition, then convert this into an average power according to your switching frequency.
If you look at just \$t2\$, \$V\$ is nearly constant, and \$I\$ increases approximately linearly, forming a triangle. Thus, the power also increases linearly, and the total energy is the time integral of power. So the energy is just the area of that triangle:
$$ E_{t2} = t_2 \left( \frac{V_{in} I_{out}}{2} \right) $$
\$t3\$ also forms a triangle. In this case, the voltage is changing instead of the current, but still the power makes a triangle, and the calculation of energy is the same.
Since the calculation is the same for \$t2\$ and \$t3\$, then it's not really important how much time is spent in \$t2\$ vs \$t3\$; all that really matters is the total time spent switching. The energy losses from one switch are thus:
$$ E_{switch} = (t_2 + t_3) \left( \frac{V_{in} I_{out}}{2} \right) $$
And, your switching frequency is how many times per second you incur this energy loss, so multiplying the two together gets you the average power loss due to switching:
$$ P_{switch} = f (t_2 + t_3) \left( \frac{V_{in} I_{out}}{2} \right) $$
So, taking your calculation of the switching period being \$150ns\$, and the maximum current being \$330A\$, and the voltage \$12V\$, and the switching frequency \$30kHz\$, the power losses from switching are:
$$ 30kHz \cdot 150ns \left( \frac{12V \cdot 330A}{2} \right) = 8.91W $$
That's \$8.91W\$, ideally, shared between three transistors, so only about \$3W\$ each, which is pretty insignificant compared to your other losses.
This number can be checked for sanity with a simpler model: if you spent \$150ns\$ switching, and you do it \$30000\$ times per second, then you can calculate the fraction of the time you spend switching, and make the most pessimistic assumption of the full power of \$12V\cdot330A\$ being lost in the transistors:
$$ \require{cancel} \frac{150 \cdot 10^{-9} \cancel{s}}{\cancel{switch}} \frac{30 \cdot 10^3 \cancel{switches}}{\cancel{s}} \cdot 12V \cdot 330A = 17.82W $$
Of course, over the switching period, the average current and voltage is only half that of the maximum, so the switching losses are half this, which is what we just calculated.
However, I bet in practice, your switching times will be slower. A "\$2A\$ gate driver" isn't a constant current source as these calculations assume. The real picture is rather more complicated than this simple model. Additionally, the current will be limited by the resistance, and usually more significantly, the inductance of the transistor packages and the traces leading to them.
Let's just say the inductance of the gate driver, transistor package, and traces to it is \$1\mu H\$. If your gate drive voltage is \$12V\$, then \$di/dt\$ is limited to \$12V/1\mu H = (1.2\cdot 10^7)A/s\$. This may seem like a lot, but on the time scale of \$150ns\$, it's not. Keeping the inductance low will take some very careful layout.
So, I would say that these calculations show that your switching losses may be manageable, though you won't know for sure until you've made the layout and tested it. Even if you can't reach the ideal of a \$150ns\$ switching time, the losses are low enough relative to your other problems that you have some margin to do worse and still function.
Your bigger problem is probably getting the three MOSFETs to switch at the same time. Otherwise, one of them will get a disproportionate share of the total current, and thus heat, leading to premature failure.
If you need DC operation, you should really use a MOSFET that has a DC rating in its Safe Operating Area.
MOSFETs that don't have the DC curve may suffer from thermal runaway when used in DC applications and are intended or specified for switching applications only. Internal, local hotspots may occur and the MOSFETs may fail ("Spirito Effect").
The reason is a falling gate-to-source threshold voltage for a rising temperature, usually at low gate-to-source voltages. The details of this issue are usually not specified in the data sheets, so the only indicator is often the SOA diagram that has or doesn't have a DC curve. Fig. 3 in your MOSFET's data sheet looks like the point of thermal VGS crossover is a bit below 4 V. In my opinion, you are on the risky side when you use this particular MOSFET with a driver that can supply 5 V only. For a worst-case scenario, consider your supply to be on the low end (4.5 V), and allow some voltage drop for the driving stage. Sooner than you might like, you end up somewhere around 3.5 V.
Note that the absolute maximum ratings (25 or 18 A at 25 or 100 °C, respectively) are specified at a gate-to-source voltage of 10 V, when your MOSFET is fully on . They do not apply at lower gate-to-source voltages.
More about the background here: https://electronics.stackexchange.com/a/36625/930
Best Answer
Usually the mosfet data-sheet will have Power De-rating curve, like this one
Which i got from the AON6403 MOSFET Datasheet, I would recommend you check the datasheet of your device for a similar curve and utilize that and pay close attention to the condition under which the curve was derived.
Otherwise you can do an approximation, de-rating means that you modified the max parameters of your device to fit your operating limits, for thermal derating the operating parameter will be the junction maximum temperature (Tjmax) (Note, that Tjmax might not be the appropriate value, since reliability will go down the closer you run to junction maximum temperature, maybe someone can provide a better guideline for that or maybe there is some safety factor that you need to apply) Now we now that a 1st order approximation for Tjmax is
Tjmax = Tambient + Power*Rja.
To derate solve re-arrange for
Power = (Tjmax - Tambient_max)/Rja.
This is just an approximation because Rja is completely dependent on your foot print layout, PCB, heat sinking, air flow, etc. a good place to start is the datasheet listed Rja value when mounted in the 1 square-in FR4 substrate, and then make assumptions that will hold valid for your design.