Electronic – Op-amp voltage boost circuit : how does it work

operational-amplifier

I want to boost the output voltage of op amp to a higher value.
I found the conceptual circuit below online.
I understand that Q1 and Q2 are used to provide the necessary supply voltage for the op-amp.

link : https://www.analog.com/media/en/technical-documentation/application-notes/28080533AN106.pdf
figure 14

But how do the other parts work ?
In particular, the voltage gain is apparently Av=3 (written in the text).
How did they arrive at that?
Should the (voltage gain)Av not be -33 ?

What is the function of R4 and R3?

EDIT:
In the answer by Photon, it is stated that the gain of the whole circuit is 33 while the gain of the output is 3 .
So you can have 2 gains in an op-amp ?
So one is the gain of the input to the Vout? and the other is the gain of the op-amp output to the actual Vout?(the second one is bit confusing)

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Best Answer

About the gain being stated as \$A_V=3\$, the complete relevant text is

R3 and R4 form an output voltage gain stage whose gain, \$A_V=3\$, is reduced to unity at high frequencies by C1 to maintain stability.

What this is saying is that R3 and R4 form a voltage divider so that

$$v_o = \frac{v_{out}}{3}$$

where \$v_{o}\$ is the voltage at the output of the op-amp IC.

Or, turned around,

$$v_{out} = 3 v_o.$$

This works because the negative feedback around the op-amp will cause it to push or pull current from its output pin to make it work.

The overall gain of the circuit is 33, as you calculated.

, it is stated that the gain of the whole circuit is 33 while the gain of the output is 3 . So you can have 2 gains in an op-amp ?

No, the "stage" formed by R3 and R4, with gain 3 doesn't really involve the op-amp.

But even within the op-amp integrated circuit itself, of course every stage in the design can have a different gain value.

So one is the gain of the input to the Vout? and the other is the gain of the op-amp output to the actual Vout?

33 is the gain from \$v_{in}\$ to \$v_{out}\$

3 is the gain from \$v_o\$ to \$v_{out}\$. I think Tim's comment does a better job explaining it than I could:

If the voltage on the op-amp output is not equal to 1/3 of the output voltage (ignoring C1), then current will flow in it's positive or negative power pin. That forms a negative feedback loop composed of the four external capacitors and the op-amps (internal) output stage.

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