Electronic – Output table equivalent to state diagram

digital-logicoutputstate-machines

I have the following state diagram to which I am supposed to construct an output table for. I have the answer, but I do not understand how they derived this output table?
If someone could explain one of the lines in the table to me, just to clear it up, that would be great!

Here is the question:

Construct a state and output table equivalent to the state diagram below. Note that the diagram is drawn with the convention that the state does not change except for input conditions that are explicitly shown:

enter image description here

Here is the table:

enter image description here

An example for me is: For row B, why is the are the transitions B,B,B,D,D? And the output Z1=1, Z2 = 0?

Another example question for me is, for S=C, the diagram shows it transitioning to G's state which is 10, why then is G not filled in for 10 in the table???

Best Answer

The leftmost column, S, is the current state. The next four columns are for indicating what state you would be in if inputs x and y were to be 00, 01, 10, or 11, respectively. The two right columns are the values of outputs z1 and z2 are for any current state.

Look at the diagram and see that z1 and z2 in the diagram match what z1 and z2 are in the table for any given state.

When you are in State B, you can only transition to one other state, D, and only if input x is a 1. That's what the x next to the arrow going from B to D means in the diagram. If it said x', that means the transition from B to D happens only when x is a 0. Variable y doesn't matter when transitioning from State B to State D.

That is why the first two xy columns are B and the second two are D.

Notice the transitions from State A to State E and from State C to State G. The xy input condition in both of these transitions is when x is 0 AND y is 1. The Boolean function is "not x AND y."

If you don't know Boolean Algebra already, that is somewhat of a prerequisite before approaching more complex state transition diagrams and tables.

Related Solutions

Electronic – Building a 2’s complementer (need help visualising how to make a state diagram and table)

That link you gave says it all:

Hint: - 2’s complement of a number can be obtained by keeping the least significant bits as such until the first 1, and then complementing all bits

"example 001010 → 110110" that is to say

   001010 -> flip bits -> 110101 -> add 1 -> 110110
msb     lsb             msb    lsb         msb    lsb


      msb    lsb
input   001010
output  110110
         <--- time

So there are two states - "I haven't seen a one yet" and "I have seen a one previously". Given my state and my current input, my output and next state are fully determined.

If my current state is "I haven't seen a one yet" and my input is a 0, my output is a 0 and my next state is (still) "I haven't seen a one yet"

If my current state is "I haven't seen a one yet" and my input is a 1, my output is a 1 and my next state is (changes to) "I have seen a one previously"

If my current state is "I have seen a one previously" and my input is a 0, my output is a 1 and my next state is (still) "I have seen a one previously"

If my current state is "I have seen a one previously" and my input is a 1, my output is a 0 and my next state is (still) "I have seen a one previously"

Write that out as a truth table encoding "I haven't seen a one yet" as 0 and "I have seen a one previously" as 1, and you should be home free.

To "wire it up" the current data input bit and the current state go into logic that feeds the input to the D-flip flop and separate logic that feeds the input to the shift register, the D-flip-flop holds the "state variable", and both are clocked by the data clock. And to be complete you need some kind of reset logic - left as an exercise to the reader. The "current state" is the output of the D-flip-flop, and next state is the input to it...

       +----------------------------+
       |                            |
       |  +---------+     +-----+   |
       +--+ Logic A +-----+ DFF +---+
Data-+-|--+         |     |     |
     | |  +---------+     | CLK |
     | |                  +--+--+
     | |                     |
     | |                     +--------Clock 
     | |                  +--+--+
     | |  +---------+     | CLK |
     | +--+ Logic B +-----+     |
     +----+         |     | S R |
          +---------+     +-----+

Simple state machine’s state table

I think you need to develop a state machine diagram similar to this (for how water is affected by stuff): -

enter image description here

Don't scrimp and scrape on "we don't need to worry about this or that" or "The supposition is that no one stays 10 seconds under the door" because you will not get a great answer because people will become disenchanted and think it is homework - just in case it is homework there is a tag you could have selected!!

You can still draw a state machine diagram and show the transistions you are discounting like the "supposition is that no one stays 10 seconds under the door" etc..

I'm sorry for sounding harsh or ultra critical but you do want this to be right, yeah?

Best Answer

Related Solutions

Electronic – Building a 2’s complementer (need help visualising how to make a state diagram and table)

Simple state machine’s state table

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