Simple state machine’s state table

digital-logic

EDIT: This is a homework question. What I need to know is how to solve the circuit through the transition table. That is, how do I write the circuits for the state changes (is it a flip-flop circuit, or a combinatorial circuit?) and the outputs?

I have a simple state machine with 3 states to control the automatic doors of a mall: waiting, entering and leaving. Two sensors, one in each side of the door, a timer that counts to 10 seconds.

The door opens when one of the sensors is activated, and remains open until the other sensor is activated or 10 seconds pass without any other input. Every time a person goes in or out, an alarm goes off. One of the suppositions is that only one person goes in or out at any time, so the sensors can't go off at the same time.

I have then 3 inputs to the circuit: S1, S2 and the Timer. And one output, the alarm A.

I was wondering how I'm supposed to write the state transitions table. I'd written something like

S1 S2 10s Q(n) Q(n+1) Alarm

0 0 0 A A 0

…

1 1 1 A X X

0 0 0 B B 0

…

1 1 1 B X X

And so on, with the 0-7 table being repeated for the states Q(n) = A, B and C.

Is this correct?

What's the next step to build the combinatorial circuit? I know I have to make the Karnaugh maps, but how do I factor in the states A, B, C? Are they supposed to be flip-flops? Are those then different "functions" I have to make the Karnaugh maps for?

Best Answer

I think you need to develop a state machine diagram similar to this (for how water is affected by stuff): -

enter image description here

Don't scrimp and scrape on "we don't need to worry about this or that" or "The supposition is that no one stays 10 seconds under the door" because you will not get a great answer because people will become disenchanted and think it is homework - just in case it is homework there is a tag you could have selected!!

You can still draw a state machine diagram and show the transistions you are discounting like the "supposition is that no one stays 10 seconds under the door" etc..

I'm sorry for sounding harsh or ultra critical but you do want this to be right, yeah?

Related Solutions

Problems deriving state diagrams

You should only consider drawing the state machine for the actual 2-complementer with serial input, and forget about the shift register (drawing a state diagram for a shift register of a given length is perfectly possible, but makes hardly any sense).

Said that, the task boils down to a single-input/single-output state machine with 2 states. Look here: http://k5rec.blogspot.com/2006/12/digital-electronics-serial-twos.html

Electronic – Building a 2’s complementer (need help visualising how to make a state diagram and table)

That link you gave says it all:

Hint: - 2’s complement of a number can be obtained by keeping the least significant bits as such until the first 1, and then complementing all bits

"example 001010 → 110110" that is to say

   001010 -> flip bits -> 110101 -> add 1 -> 110110
msb     lsb             msb    lsb         msb    lsb


      msb    lsb
input   001010
output  110110
         <--- time

So there are two states - "I haven't seen a one yet" and "I have seen a one previously". Given my state and my current input, my output and next state are fully determined.

If my current state is "I haven't seen a one yet" and my input is a 0, my output is a 0 and my next state is (still) "I haven't seen a one yet"

If my current state is "I haven't seen a one yet" and my input is a 1, my output is a 1 and my next state is (changes to) "I have seen a one previously"

If my current state is "I have seen a one previously" and my input is a 0, my output is a 1 and my next state is (still) "I have seen a one previously"

If my current state is "I have seen a one previously" and my input is a 1, my output is a 0 and my next state is (still) "I have seen a one previously"

Write that out as a truth table encoding "I haven't seen a one yet" as 0 and "I have seen a one previously" as 1, and you should be home free.

To "wire it up" the current data input bit and the current state go into logic that feeds the input to the D-flip flop and separate logic that feeds the input to the shift register, the D-flip-flop holds the "state variable", and both are clocked by the data clock. And to be complete you need some kind of reset logic - left as an exercise to the reader. The "current state" is the output of the D-flip-flop, and next state is the input to it...

       +----------------------------+
       |                            |
       |  +---------+     +-----+   |
       +--+ Logic A +-----+ DFF +---+
Data-+-|--+         |     |     |
     | |  +---------+     | CLK |
     | |                  +--+--+
     | |                     |
     | |                     +--------Clock 
     | |                  +--+--+
     | |  +---------+     | CLK |
     | +--+ Logic B +-----+     |
     +----+         |     | S R |
          +---------+     +-----+

Best Answer

Related Solutions

Problems deriving state diagrams

Electronic – Building a 2’s complementer (need help visualising how to make a state diagram and table)

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