Electronic – PIC24 PLL initial value

oscillatorpicpll

I'm setting up my PIC oscillator frequency and I'm using a PIC24HJ128GP202. From what I've seen in the datasheet, two of my total options were to use a crystal or a internal oscillator (FRC) which would go through the PLL and scale my frequency of operation up to 80MHz.

I decided to use a 10MHz external crystal. To reach 40 MIPS I should configure correclty the PLL parameters N1, N2 and M. It all seems to be fine except that these last parameters are configurable by software. I was used to PIC's like PIC18f4550 where these oscillator settings were configurable through the configuration bits. So whenever I program the device, it would have those settings always after reset.

In this case (PIC24HJ128GP202) I can only configure what kind of oscillator I will use in the configuration bits (HS with PLL). PLL is only configurable by software. So, since the PLL default values will get my frequency out of the bounds specified by the datasheet, how can I configure the PLL by software if the software requires a correct oscillator frequency of operation? Is it the case of using IESO (start-up with internal oscillator)? Any other way around this problem?

Best Answer

Please refer to section 2.7 in the datasheet.

If the PLL of the target device is enabled and configured for the device start-up oscillator, the maximum oscillator source frequency must be limited to 4 MHz < FIN < 8 MHz to comply with device PLL start-up conditions. This means that if the external oscillator frequency is outside this range, the application must start-up in the FRC mode first. The default PLL settings after a POR with an oscillator frequency outside this range will violate the device operating speed.

Looks like you will have to start-up with the internal oscillator and then switch to your specific settings.

Related Solutions

Electronic – Clarification on what the max freq of PIC24FJ64 is

The datasheet is correct, as they usually are. The PIC 24F family can run at a maximum instruction cycle rate of 16 MHz, which can be expressed as 16 MIPS (Million Instructions per Second). This processor requires 2x clock over the instruction rate, so the maximum clock is 32 MHz. You can achieve 32 MHz clock with a 8 MHz crystal and the 4x PLL. That will result in 16 MHz instruction clock.

Electronic – Can’t run PIC24EP128MC206 at rated speed

You should check out example 7-2 in the pic24E family reference manual (FRM) titled "Code Example for Using PLL with 7.37 MHz Internal FRC":

// Select Internal FRC at POR
_FOSCSEL(FNOSC_FRC & IESO_OFF);
// Enable Clock Switching and Configure Primary Oscillator in XT mode
_FOSC(FCKSM_CSECMD & OSCIOFNC_OFF & POSCMD_NONE);

int main()
{
    // Configure PLL prescaler, PLL postscaler, PLL divisor
    PLLFBD=63;            // M=65
    CLKDIVbits.PLLPOST=0; // N2=2
    CLKDIVbits.PLLPRE=0;  // N1=2

    // Initiate Clock Switch to FRC oscillator with PLL (NOSC=0b001)
    __builtin_write_OSCCONH(0x01);
    __builtin_write_OSCCONL(OSCCON | 0x01);

    // Wait for Clock switch to occur
    while (OSCCONbits.COSC!= 0b001);

    // Wait for PLL to lock
    while (OSCCONbits.LOCK!= 1);
}

It looks like the critical step you're missing is __builtin_write_OSCCONL(OSCCON | 0x01);

Also, looking at the math: 7.37*(76/(2*2)) == 140.03MHz which is slightly outside the allowed range, assuming that 140MHz is actually the maximum range (don't ask me why but for some reason it seems like it may be 120MHz).

If this still doesn't work then perhaps there's just an issue with your power supply. The internal FRC oscillator is unstable under temperature and voltage stress, so perhaps you should check to see if you have too much noise. This would make the FRC wonky as well as the VCO used in the PLL, preventing a lock.

If you look at table 30-18 in the pic24EP128MC206 datasheet, it tells you that over the temperature and voltage range you have about a ±1% for some models and ±2% for others. Figure 31-9 shows the variation with a stable voltage over a temperature range. There doesn't appear to be an analysis of voltage variation at a stable temperature.

If you're trying to get a stable run at a high frequency I would just grab a crystal.

EDIT (from comment): So from the sounds of your other posts about your conditions it sounds like you should look elsewhere for a problem. What's the frequency of the ripple? Did you size the internal Vreg capacitor properly? It sounds like since this is a locking issue and not a setting issue you're having some other problems with the board that aren't related to your code.

EDIT:

Glad this turned out to be the right answer! Good luck debugging the rest of the board!

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