You should check out example 7-2 in the pic24E family reference manual (FRM) titled "Code Example for Using PLL with 7.37 MHz Internal FRC":
// Select Internal FRC at POR
_FOSCSEL(FNOSC_FRC & IESO_OFF);
// Enable Clock Switching and Configure Primary Oscillator in XT mode
_FOSC(FCKSM_CSECMD & OSCIOFNC_OFF & POSCMD_NONE);
int main()
{
// Configure PLL prescaler, PLL postscaler, PLL divisor
PLLFBD=63; // M=65
CLKDIVbits.PLLPOST=0; // N2=2
CLKDIVbits.PLLPRE=0; // N1=2
// Initiate Clock Switch to FRC oscillator with PLL (NOSC=0b001)
__builtin_write_OSCCONH(0x01);
__builtin_write_OSCCONL(OSCCON | 0x01);
// Wait for Clock switch to occur
while (OSCCONbits.COSC!= 0b001);
// Wait for PLL to lock
while (OSCCONbits.LOCK!= 1);
}
It looks like the critical step you're missing is __builtin_write_OSCCONL(OSCCON | 0x01);
Also, looking at the math: 7.37*(76/(2*2)) == 140.03MHz which is slightly outside the allowed range, assuming that 140MHz is actually the maximum range (don't ask me why but for some reason it seems like it may be 120MHz).
If this still doesn't work then perhaps there's just an issue with your power supply. The internal FRC oscillator is unstable under temperature and voltage stress, so perhaps you should check to see if you have too much noise. This would make the FRC wonky as well as the VCO used in the PLL, preventing a lock.
If you look at table 30-18 in the pic24EP128MC206 datasheet, it tells you that over the temperature and voltage range you have about a ±1% for some models and ±2% for others. Figure 31-9 shows the variation with a stable voltage over a temperature range. There doesn't appear to be an analysis of voltage variation at a stable temperature.
If you're trying to get a stable run at a high frequency I would just grab a crystal.
EDIT (from comment):
So from the sounds of your other posts about your conditions it sounds like you should look elsewhere for a problem. What's the frequency of the ripple? Did you size the internal Vreg capacitor properly? It sounds like since this is a locking issue and not a setting issue you're having some other problems with the board that aren't related to your code.
EDIT:
Glad this turned out to be the right answer! Good luck debugging the rest of the board!
Please refer to section 2.7 in the datasheet.
If the PLL of the target device is enabled and configured for the
device start-up oscillator, the maximum oscillator source frequency
must be limited to 4 MHz < FIN < 8 MHz to comply with device PLL
start-up conditions. This means that if the external oscillator
frequency is outside this range, the application must start-up in the
FRC mode first. The default PLL settings after a POR with an
oscillator frequency outside this range will violate the device
operating speed.
Looks like you will have to start-up with the internal oscillator and then switch to your specific settings.
Best Answer
Generally when you go outside what is recommended the behavior is undefined. It's not guaranteed to work, but neither is it guaranteed not to work. It might work when it's cold but not when it's hot. It might work at 3.3V Vdd but not at 3.29V Vdd. It might work on 19 units and fail on the 20th.
That said, if everything else was nominal (not too hot or cold, power supply near nominal) it's unlikely, in my (somewhat ill-considered) opinion, that they could make it tetchy enough that it would work perfectly at 200MHz and fail at 201, but if it does happen to behave that way you have nobody to blame but yourself.
From the datasheet: