Electronic – Power rails routing question

pcb-designroutingstack up

I am currently designing a pretty big 4-layer development board 350mm x 270mm. Keeping in mind I have multiple analog digital and AC mains voltage, what would the best practice be regarding routing my 12V + 5V + 3.3V rails?

My options:

  • Option 1

    Route power rails on separate plane and stitch together the required polygon pours.

  • Option 2

    Use each plane for GND, 12V, 5V, 3V3 and stitch as needed.

  • Option 3

    Route power rails separately on multiple planes as needed.

With option 1 I will only use 1 plane (bot) for all my power rails, but have the analog and digital signals in-between. Could that cause EMI?

With option 2 I will have huge capacitance between planes?

With option 3 I have long fat traces running around my board.

What would the best option be (or the one with the least problems)?

Best Answer

In a 4 layers board, at least 1 unbroken** plane should be for GND. Actually, for most 4 layers projects, I actually use 2 unbroken planes for GND.

About Power planes, ask yourself the following questions:

  1. are there power hungry high speed chips such as processors, FPGAs? If so, their supplies should each be tightly coupled to a GND plane, to create very low inductance planar capacitors. As a rule of thumb: when the necessary power supply impedance is below 1 Ohm at GHz, planar capacitance is in order. The necessary area depends on the required power supply impedance. For small RF chips a local power pour can be enough, whereas large processors might need a supply impedance of less than 10 mOhm and might require multiple power planes for the same rail. Violating this will affect both signal integrity and EMC. Also putting a power plane that is not tightly coupled to a GND plane, does not satisfy this bullet.

  2. for other power rails with no/negligible demand at 100MHz+ frequencies, it is often OK to route them (in a tree fashion to reduce common impedance coupling between consumers) and offer local decoupling caps. But still do pay attention to return currents in the GND plane. If you don't, EMC can be affected. Vias are also fine.

  3. for low frequency stuff, it is basically always ok to route power. But for precision analog, consider that PSRR is finite. So for precision analog even a 10mV droop on a 10V supply rail might affect signal quality, so choose your traces wide enough. Again it comes down to the desired power supply impedance. The return paths are less critical for these rails, but should be of a similarly low impedance than the supply traces, e.g. the GND plane. Another thing about precision parts: Even though you don't really reduce the power supply impedance in the e.g. audio band by adding a 100nF cap next to your opamps, I would still practise this. It makes the local supply voltage more immune to high frequency interference from nearby circuitry.

After going through 1-3 and you find that you need too much space for Power pours/areas/traces, you might find that you need to go to 6 layers. Cramming it in 4 layers while partially violating bullet (1) is not recommended if you care about signal integrity and EMC.

Your side question about EMI is a little related. If you need to route high speed signals, for the sake of signal integrity and EMI, pay attention to tightly coupled them either to a GND plane or their originating power plane for high frequency return currents. Most of the time in 4 or 6 layer boards, this means route over a GND plane, because there is no tightly coupled layer next to power (all of this layer is occupied by GND). In such stackups, IMO signals should be therefore on the same layer as the power distribution.

** you mentioned mains voltage. The layout safety rules for mains voltage demand that your isolated mains circuitry is not surrounded by the GND planes. your mains section should be physically separate (following clearence+creepage) with no overlap to any of your low voltage planes.