I understand that for MIPS-32, the first 4 bits of the address to jump to are taken from the first 4 bits of the address of j instruction, which means that we have a boundary of 2^28 bits around the address of the j instruction that we can jump to. Online it says this boundary is 256MB but 2^28 bits is 32MB and not 256MB. Can anyone explain why it is 256MB?
Electronic – Range of MIPS j instruction
assemblymips
Related Topic
- Electronic – MIPS (PIC32): branch vs. branch likely
- Electronic – In disassembly, I see instruction LI, but I can’t find such instruction in MIPS instruction set
- Electrical – MIPS: Instruction Memory: Referring to instruction in memory
- Electrical – Implement BGEZAL instruction-MIPS-32 in verilog
- Electronic – mips single-cycle branch verilog
- Electrical – beq assembly MIPS
Best Answer
Addressing in most CPU cores I know works on a per-byte basis. You don't address individual bits.
The MIPS requires it's instructions to be 4-byte (word) aligned - i.e. the two LSBs are always zero. That way, they're not encoded in the instructions.
@sherrelbc's answer explains it quite thoroughly, although I like the semantics of "word-aligned" more, than "word-addressed".
The link @valcroft gave also has the answer mid-page:
PC <- PC31-28::IR25-0::00
So, 26 bits left shifted by two gives a relative address boundary of \$2^{28}.\$
\$2^{28} bytes\$ is \$256 MiB\$, or \$256*1024^2\$.