There won't be any problem (except for added power and cost) if you use a clock fanout buffer in this design, but I doubt if you actually need it.
Because your DACs are all located within 5 inches of each other you should be okay with a single receive buffer at the end of the ribbon cable. The fan-out from the receive buffer can be either a star with source-series termination for each fanning out line, as in apalopohapa's answer, or a daisy-chain with a split termination at the far end. The split termination would be a resitor to ground and one to Vcc, providing a Thevenin equivalent of R0 to VCC/2. R0 would match your nominal transmission line impedance, depending on your track geometry. Using a 50 Ohm characteristic impedance is common, but you will save power if you use a higher value like 75 or 100 Ohms.
With a maximum 5 inches between DACs you'd be talking about up to 1 ns difference in the update times between the DACs, out of a sampling period of 8 ns. The time difference would be very repeatable over time and temperature because it just depends on the track lengths between the chips.
N.B. Remember that however you buffer your clock signal, you'll also want to buffer your data signals to manage their delay to maintain correct sample & hold times at the DAC inputs.
Talking about signal termination is like opening a can of worms. This is a HUGE subject that is difficult to summarize in just a couple hundred words. Therefore, I won't. I am going to leave a huge amount of stuff out of this answer. But I will also give you a big warning: There is much misinformation about terminating resistors on the net. In fact, I would say that most of what's found on the net is wrong or misleading. Some day I'll write up something big and post it to my blog, but not today.
The first thing to note is that the resistor value to use for your termination must be related to your trace impedance. Most of the time the resistor value is the same as your trace impedance. If you don't know what the trace impedance is then you should figure it out. There are many online impedance calculators available. A Google search will bring up dozens more.
Most PCB traces have an impedance from 40 to 120 ohms, which is why you found that a 1k termination resistor did almost nothing and a 100-ish ohm resistor was much better.
There are many types of termination, but we can roughly put them into two categories: Source and End termination. Source termination is at the driver, end termination is at the far end. Within each category, there are many types of termination. Each type is best for different uses, with no one type good for everything.
Your termination, a single resistor to ground at the far end, is actually not a very good. In fact, it's wrong. People do it, but it isn't ideal. Ideally that resistor would go to a different power rail at half of your power rail. So if the I/O voltage is 3.3v then that resistor will not go to GND, but another power rail at half of 3.3v (a.k.a. 1.65v). The voltage regulator for this rail has to be special because it needs to source AND sink current, where most regulators only source current. Regulators that work for this use will mention something about termination in the first page of the datasheet.
The big problem with most end-termination is that they consume lots of current. There is a reason for this, but I won't go into it. For low-current use we must look at source termination. The easiest and most common form of source termination is a simple series resistor at the output of the driver. The value of this resistor is the same as the trace impedance.
Source termination works differently than end termination, but the net effect is the same. It works by controlling signal reflections, not preventing the reflections in the first place. Because of this, it only works if a driver output is feeding a single load. If there are multiple loads then something else should be done (like using end termination or multiple source termination resistors). The huge benefit of source termination is that it does not load down your driver like end termination does.
I said before that your series resistor for source termination must be located at the driver, and it must have the same value as your trace impedance. That was an oversimplification. There is one important detail to know about this. Most drivers have some resistance on it's output. That resistance is usually in the 10-30 ohm range. The sum of the output resistance and your resistor must equal your trace impedance. Let's say that your trace is 50 ohms, and your driver has 20 ohms. In this case your resistor would be 30 ohms since 30+20=50. If the datasheets do not say what the output impedance/resistance of the driver is then you can assume it to be 20 ohms-- then look at the signals on the PCB and see if it needs to be adjusted.
Another important thing: when you look at these signals on an o-scope you MUST probe at the receiver. Probing anywhere else will likely give you a distorted waveform and trick you into thinking that things are worse than they really are. Also, make sure that your ground clip is as short as possible.
Conclusion: Switch to source termination with a 33 to 50 ohm resistor and you should be fine. The usual caveats apply.
Best Answer
30 MHz is enough that you do need to treat the signal as a transmission line problem. You'll need to pay attention to board layout across the design, including and especially at the connectors. You'll need to bring extra ground pins along with your 30 MHz signal, or possibly use special connectors.
You'll need information about the layout of your board, number of layers, and you may need to coordinate with your intended board manufacturer so that they can target a specific characteristic impedance for you, or just to get parameters such as dielectric constants.
It does sound like you're aware of many of these issues, but I thought it best to address them, because if you're not careful you may get a design that is functional but emits a lot of RF and will never get through an EMI test.
Guidelines for routing the signal:
Of course, in a real-world design, you might have to break some one of those guidelines.
Most of these rules follow from the observation that at high frequencies, the return current will try to travel close to the signal, so you must provide a path for the return current. If the return current is physically separated, you are creating a parasitic antenna. The ground (or power!) plane that provides a path for the return current is called the reference. Don't leave the reference plane. If you have to go through a via, the reference plane changes. The bypass capacitor is set between the new and old reference planes.
Your connectors will pose a problem, because they will likely have a different impedance from the PCB, so they will cause reflections and degrade the signal. One option may be to use an impedance controlled connector that matches the board impedance.
On the firmware side, you may need to experiment with drive strength to control the edge rate. Maximum drive strength is often the wrong answer. Your IC vendor should be able to provide an IBIS model, with which you can simulate the circuit to estimate signal integrity. Strictly speaking, it is not the clock frequency that causes signal integrity or EMC problems, but the edge rate (the time to transition between high and low) because fast edges manifest as broadband transients in the frequency domain. Reducing drive strength and/or slew rate will reduce the edge rate, and reduce harmonic emissions, while (probably) increasing clock jitter. Check the datasheets to see what the acceptable edge rate is for the clock's receivers.
My sense is that if you do your homework, you probably won't need any sort of signal repeater. Consider SCSI for example, which is a huge high speed parallel bus distributed over cables at around 100 MHz. If possible, consider investing in a program such as HyperLynx to simulate your layout.
Altera has an excellent guide for high speed routing issues.