Electronic – Shift register explanation (parallel in – serial out)

digital-logicshift-register

The task is to implement a 4-bit shift register with parallel input and serial output using JK flip-flops and standard logic gates. The solution is below:

This is what happens on the output:

I don't understand what the SHIFT/LOAD is. Can you please explain what happens in this register if we want to input the number 1010?

According to the schematic, SHIFT/LOAD represents mode.
If pin SHIFT/LOAD is set to

• logic 1 the SR will move it's values. (Q0 will shift in Q1, Q1 in Q2, Q2 in Q3, Q3 in O3)
• logic 0 the SR will read values from pins (D1=Q1,D2=Q2,D3=Q3, Q0/D0 does not depend on SHIFT/LOAD pin)

If we want to input 1010 in the shift register, we will need to use one of two methods.

Serial way:

1. Set SHIFT/LOAD to 0 (t=1)
2. Set D0 to 0 (t=1)
3. SHIFT/LOAD = 1 (Q0 goes in Q1) (t=2)
4. Set D0 to 1 (in the following clock cycle, Q1 goes in Q2 and Q0 into Q1) (t=2)
5. D0=0 (Q2 in Q3, Q1 in Q2, Q0 in Q1) (t=3)
6. D0=1 (Q3 in O3, Q2 in Q3, Q1 in Q2, Q0 into Q1) (t=4)

Parallel way:

1. Set SHIFT/LOAD = 1 (t=1)
2. Set D0=1, D1=0, D2=1, D3=0. (t=2)