Electronic – SPI multiple slave termination

pcbsignal integrityspitermination

I've been reading about signal integrity and went through this site reading about it as well as other references. Alot of the topics deal with a single slave, but not so much multiple slaves.

I'll be working on something soon that will require multiple slave devices (I do not have a number yet), but for the purpose of this question, lets just assume the following

  1. 5 slave devices
  2. 1MHz clock
  3. Max spacing between any two slaves is 15cm (if this even matters)

Questions

  1. How should MOSI, MISO, CLK be connected (topology) ?
  2. How should MOSI, MISO and CLK be terminated ? I heard that source termination is only good if there is one slave.
  3. Would CS require termination as well ?

Best Answer

SPI allows the so called "Daisy-Chain" and multi-slave topology. You seems to need multi-slave. Note that altough you will need a separate signal for the CS pin of every chip, you can share the MOSI/MISO/CLK pins between your nodes.

For your parameters, I think that a proper routed board will suffice since you are not working at high clock/signal speeds.

I never heard of SPI pins being terminated. You must indeed take care of grounding and avoiding short-circuits.

Note also, that I2C looks like a more appropriate solution for connecting several devices in a BUS (altough with less speed).

You can have your setup like this:

HOST_MOSI -> DEVICE1_MOSI, DEVICE2_MOSI, ..., DEVICEn_MOSI
HOST_MISO -> DEVICE1_MISO, DEVICE2_MISO, ..., DEVICEn_MISO
HOST_CLK -> DEVICE1_CLK, DEVICE2_CLK, ..., DEVICEn_CLK

HOST_PIN1 ->DEVICE1_CS
HOST_PIN2 ->DEVICE2_CS
  ...
HOST_PINn ->DEVICEn_CS

You might want to read link 1.