Electronic – the meaning (definition) of “current-starving”

designtransistors

In several circuit descriptions we can find the term „current-starved“, „current-starving“ or „voltage-starved“.

Example

In chapter 4 (Current-starved voltage-controlled oscillator) we can read:

This VCO is designed using ring oscillator and its operation is also
similar to that. From the schematic circuit shown in the Fig.(3), it
is observed that MOSFETs M2 and M3 operate as an inverter, while
MOSFETs M1 and M4 operate as current sources. The current sources, M1
and M4, limit the current available to the inverter, M2 and M3; in
other words, the inverter is starved for the current.

From this, I derive that „current-starved“ is similar (or even identical?) to current-limiting. Is this correct? Does anybody know the definition of „starving“ in this context?

Best Answer

Something that goes near to a formal definition can be found in this GoogleBook page. Excerpt:

Another way to control the delay of an inverter is to add two extra transistors as shown in Fig.4.15a. This technique is also known as current starving. Lowering Vn and increasing Vp increases the effective drive resistance Req of the inverter and thus increases the delay. The voltages Vn and Vp can be generated from the one control current Ictrl using current mirrors as shown in Fig.4.15b. Alternatively, the current source can be omitted, so that Vn can be set externally and determines Vp. A third option is to leave both voltages as external bias voltages. This allows tuning out any differences in resistance between the nMOS and pMOS transistors as well.

enter image description here

Further searching on Google seems to confirm that the phrase "current starving" (or similar) mostly appear in the context of limiting the current of a digital-logic inverter of some sort.

In particular see this Wikipedia article on ECL logic operation. Excerpt:

At low input voltage (logical "0") or at high input voltage (logical "1") the differential amplifier is overdriven. The one transistor (T1 or T3) is cutoff and the other (T3 or T1) is in active linear region acting as a common-emitter stage with emitter degeneration that takes all the current, starving the other cutoff transistor.

Another GoogleBook reference states the following:

enter image description here

So it seems to me that current starving is not an exact synonym for current limiting, but it is a more specific term used when limiting applies to the output current of active elements for the purpose of altering their operating characteristics, in contrast to current limiting as a protection against overloads.

Related Topic