Electronic – Time average for two caches , cpu and ram

No, having separate caches does not turn a von Neumann machine into a Harvard machine; both caches still represent the same external memory. But separating the caches for instructions and data improves performance by preventing the two streams from interfering with each other.

The set-associativity, or "way"-ness of a cache is simply an indicator of performance (hit rate). It refers to the number of aliases for a particular cache slot that can be held in the cache before one of them needs to be replaced. In general, a cache with higher associativity will have better performance on most typical kinds of code, at the expense of requiring more complex control logic.

By not decoupling the activity of the memory from the activity of the CPU, you're throwing away most of the benefit of having a cache.

But based on how you've described your system so far, it sounds like your analysis is correct: Increasing the line size will in effect prefetch some of the data, but this will not result in any performance gain. In fact, it could result in a slight performance loss on those occasions when the prefetched data is never actually used — the time spent fetching it was simply wasted.