Electronic – Trouble on understanding ALU 2-bit design

It is possible that there is a "clock" line which must get an impulse for each of the 4 carry full adders until the right result is available at the output. If you have a clock pin somewhere feed it manually with at least 5 impulses or connect it to a continuous clock signal. Let the input lines be static and check if the carry is correct...

Let's look at bit level what happens in an addition. We're going to add 1111 to 1000.

• First, take the Least Significant Bits (LSB, the most right). We have a 1 and a 0. Summed, that makes 1. There's no overflow here.
• Now, the second bit. Again a 1 and a 0, so again a 1. No overflow, again.
• The same goes for the third bit.
• The Most Significant Bit (MSB, the most left) is different: two ones. This gives summed a 0, with an overflow. That would mean the fifth bit would get an extra 1, however, there's no fifth bit, so the overflow is placed in the carry.

The end result is thus: 0111

Now, let's have a look at the status bits.

• Z: "Indicates that the result of an arithmetic or logical operation (or, sometimes, a load) was zero." Is 0111 zero?
• V: "Indicates that the signed result of an operation is too large to fit in the register width using twos complement representation." Did we have an overflow?
• C: "used to indicate when an arithmetic carry or borrow has been generated out of the most significant ALU bit position." Was the MSB carried out?
• N: "Indicates that the result of a mathematical operation is negative." Is the result negative?