I'm working on a high speed board design containing transimpedance amplifiers.
Right now, my layout seems fine, but I'm concerned about placing vias to connect ground planes. This is a 6-layered board, with all planes designated as ground planes. I was told that you should place ground vias to connect the ground planes together in order to create a stronger connection to ground between all the layers and/or possibly reduce the inductance of the overall board to allow for faster signaling.
Does the size of the via really matter, or is it better to just have as many vias as possible wherever you can? Are there some recommended areas where I should place more vias? Is this perhaps overkill with the vias? I'm using a coaxial connector for the output of the signal, so I placed tiny vias around it close to the no fill zones.
Best Answer
The size of the via matters, because it changes the value of inductance and resistance. Go find a PCB trace\via calculator. I get lower values of inductance with a larger radius (probably because the current is spread out). Vias can be 1 to 10nH. They also have a charateristic impedance so you can get reflections and in high frequency designs, they need to be matched.
Each piece of copper can be modeled with resistance and inductance. There exists mutual coupling between currents via magnetic fields on a PCB which can be modeled as mutual inductance. Electric fields between conductors can be modeled as capacitance. There are calculators available and papers on how to model these effects. Once you have a value for inductance, resistance and\or capacitance, you can model this in your circuit diagrams and hand calculations or in a spice package.
If your intention is to provide a path for return current between planes then probably not. High frequency currents take the path of lowest impedance. Adding more vias is paralleling the inductance which will lower it if that is your objective. Realize that there is also inductance between vias from the copper itself, eventually adding more vias will have diminishing returns as most of the current will take the first few rows of vias. Place vias close to the source to minimize inductance from planes and traces when connecting planes or providing paths for return currents.