This seems to be a silly question, but the fact is that when I tried to search for related information, none of the search results gave me satisfactory answer.

# Logic Gates with 1-bit Input and 1-bit Output

Since the input has \$B=1\$ bit, the truth table has \$C=2^B=2^1=2\$ rows. Since for every row in the truth table, there are \$2\$ choices (\$0\$ or \$1\$) for the output, there are \$2^C=2^{2^B}=2^{2^1}=4\$ different truth tables in total.

Here is a table of truth tables (each truth table is written as a row):

$$

\begin{array}{|c|c|c|c|}

\hline

(0) & (1) & \text{Name} & \text{Formula} \\

\hline

0 & 0 & \text{Constant Zero} & 0 \\

\hline

0 & 1 & \text{Identity} & X \\

\hline

1 & 0 & \text{NOT Gate / Negate / Invertor} & \overline{X} \\

\hline

1 & 1 & \text{Constant One} & 1 \\

\hline

\end{array}

$$

# Logic Gates with 2-bit Input and 1-bit Output

Since the input has \$B=2\$ bits, the truth table has \$C=2^B=2^2=4\$ rows. Since for every row in the truth table, there are \$2\$ choices (\$0\$ or \$1\$) for the output, there are \$2^C=2^{2^B}=2^{2^2}=16\$ different truth tables in total.

Here is a table of truth tables (each truth table is written as a row):

$$

\begin{array}{|c|c|c|c|c|c|}

\hline

(0,0) & (0,1) & (1,0) & (1,1) & \text{Name} & \text{Formula} \\

\hline

0 & 0 & 0 & 0 & \text{Constant Zero} & 0 \\

\hline

0 & 0 & 0 & 1 & \text{AND Gate} & XY \\

\hline

0 & 0 & 1 & 0 & \color{red}{\text{Gate-0010}} & X\overline{Y} \\

\hline

0 & 0 & 1 & 1 & \text{Identity on X} & X \\

\hline

0 & 1 & 0 & 0 & \color{red}{\text{Gate-0100}} & \overline{X}Y \\

\hline

0 & 1 & 0 & 1 & \text{Identity on Y} & Y \\

\hline

0 & 1 & 1 & 0 & \text{XOR Gate} & X \oplus Y \\

\hline

0 & 1 & 1 & 1 & \text{OR Gate} & X + Y \\

\hline

1 & 0 & 0 & 0 & \text{NOR Gate} & \overline{X + Y} \\

\hline

1 & 0 & 0 & 1 & \text{XNOR Gate} & \overline{X \oplus Y} \\

\hline

1 & 0 & 1 & 0 & \text{NOT Gate on Y} & \overline{Y} \\

\hline

1 & 0 & 1 & 1 & \color{red}{\text{Gate-1011}} & X + \overline{Y} \\

\hline

1 & 1 & 0 & 0 & \text{NOT Gate on X} & \overline{X} \\

\hline

1 & 1 & 0 & 1 & \color{red}{\text{Gate-1101}} & \overline{X} + Y \\

\hline

1 & 1 & 1 & 0 & \text{NAND Gate} & \overline{XY} \\

\hline

1 & 1 & 1 & 1 & \text{Constant One} & 1 \\

\hline

\end{array}

$$

# Questions

- What are other names for these gates? As shown above, the
`NOT Gate`

is also called the`Negate`

function, or the`Inverter`

. - From my research, I know that the name
**XNOR Gate**is more popular than**NXOR Gate**. However, the gate is equivalent to a**NOT XOR Gate**. Why does the**X**come before the**N**then (unlike other "NOT something" gates)? - Are there widely used names for the gates marked \$\color{red}{\text{red}}\$ above?
- In this question, \$\color{red}{\text{Gate-0100}}\$ is also called
**SAND Gate**, which stands for "Single-inversion AND Gate". However, I am not sure if this is widely used in the field. - In this answer, \$\color{red}{\text{Gate-1011}}\$ (in fact, it is a "NOT SAND" Gate) is called
**Inclusion Gate**or**IF-THEN Gate**. Again, is there a proper name for this gate? How do IC user manuals refer to a gate with the same truth table? - In this reference, \$\color{red}{\text{Gate-1011}}\$ is called
**Logical Implication**.

- In this question, \$\color{red}{\text{Gate-0100}}\$ is also called

# == Edited: 2019-04-10 ==

I just found this Wikipedia article by chance, which names all 16 gates (operations).

## Best Answer

Most of the two-input gates have a single name (AND, OR, etc.), but single-input gates are named not only after the logical function (NOT), but also after the effect they have on the signal or the function they have in the circuit ("inverter", "((non-)inverting) buffer/driver").

"XNOR" is just easier to pronounce that "NXOR".

The gates marked in red are not widely used, so there are no common names for them. Implementations actually exist in configurable multi-function gates (74xxx1G57/58/97/98/99), but only as a side effect of the configurability. The SN74LVC1G97 datasheet describes them as "(N)OR/(N)AND gate with one inverted input", and that is probably the easiest way to understand them: