Electronic – What’s the reason for power-down sequencing in a SOC? Can you damage it in some way

powerpower-sequencingsoc

Power-on sequencing I understand. But why do power-off sequencing? I could understand if you had to do something before power died, or maybe you just wanted to shutdown I/O before core so that no crazy pins are toggled while you're on your way down.

Is there a situation where you could risk damaging the part? Only thing I think of there is maybe ESD diodes.

Best Answer

The same problems as during power on apply to powering off.

A common problem is that in ICs, transistors are placed so that their junctions are reverse biased by the supply rails. If a higher voltage supply turns on slower or shuts of faster than a lower voltage one, that assumption may no longer be true, large currents can flow through the (now) forward biased junctions, destroying them.