It is known that for smaller technologies, the channel length modulation effect is more prominent. However, is there any condition (biasing,voltage levels, transistor sizing ..etc) from which we can decide to reasonably neglect the channel length modulation effect in MOSFETs?
In a simple common source amplifier, if ro is much larger than any parallel resistance, we ignore it.
I also read that when Vds of a transistor is much larger that VDS,sat it is important to consider ro (I am not sure why though)
In other words, under which conditions we may assume that the channel length modulation has minimal effect on the gain,drain current etc.?
Best Answer
It significantly depends on the situation, but usually you can use the simple equation:
$$r_0 \approx \frac{V_E\cdot L}{I_{DS}}$$
\$V_E\$ is the so-called Early voltage (similar to BJT's) in \$V/\mu m\$. This equation works pretty well even for smaller transistor features but more importantly, it tells you the basic trade-offs for the output impedance, even if you don't calculate it explicitly.
Once you have this rough estimate you can find out if your output impedance can be considered negligible.
For large \$v_{DS}\$, you may experience a decreased \$r_0\$ due to Drain-Induced Barrier Lowering (DIBL). The drain voltage then influences the threshold voltage in such a way that the drain current increases.