Why there are IPC footprint Levels A and B?
I believe it has to do with the standard related to tape and reel feeding, but I will appreciate a more elaborated answer.
Electronic – Why there is IPC Level A and B
footprintipc
Related Solutions
It is in IPC-7351B. I have the original document, not the "B" version, and the information is in Section 3, Design Requirements. The dimensions aren't given directly; instead, there are suggested allowances and tolerances depending on the part size, lead shape, etc. For example, here is a table suggesting how much extra space to give around the component leads:
As you can imagine, it's not easy to use this document, especially when all you want are land patterns :)
I highly recommend using Library Expert. It packages all of the IPC-7351 recommendations together. The Lite version is free, and it creates IPC-7351-compliant footprints for a bunch of PCB tools, including Altium, OrCAD, Eagle, etc...
You can tell it which Density Level to uses ("Most", "Nominal", and "Least"). This refers to how much the land patterns will protrude from the actual point of connection.
Please see this earlier answer for more info on Density Levels.
Good luck.
The IPC Density setting has to do with how tightly-packed with components your design will be. In Altium (and other software) this will affect both the land patterns and also the clearances.
For example, "high density" is to be used if you need to place components very close to each other. A high-density footprint will have smaller soldering locations and also will allow parts to placed closer together without raising any errors.
I would recommend low-density unless you run out of room. The primary reason is for ease-of-soldering. The low-density pads are generally large enough to solder to by hand, whereas the high-density pads can require reflow soldering.
Also, some assembly houses charge a premium for tightly-packed component placement.
Related Topic
- Electronic – IPC Specification for pad width vs. pin width (SMD)
- Electrical – Altium Designer IPC Footprint wizard error for chip components
- Electronic – ‘One for all’ standardized land pattern v.s. specified land pattern in datasheet
- Electrical – IPC-7351C polarization mark in real-life
- Electronic – How in-depth is the IPC “Introduction to Printed Circuit Design” course
- Electronic – SMT Multi-Footprint Size to IPC standards for production
Best Answer
Generally speaking, there could be as many footprints as you need depending on the criteria set to be satisfied in each possible (working) case.
Below is an example of a hypothetical SMD resistor's footprints prepared in relation with the target board manufacturing/fabrication process: hypothetically you desire the first if you plan to design a pcb that will be fabricated in a small number with next manual assembling, ect...
Returning to IPC, at least IPC-7351 defines three distinction criterions which could be combined very arbitrarily depending again on your design goals:
At the most principal part of the description in this standard: