How does Instruction Code tell an automated adder what to do? (Charles Petzold Code book, Chapter 17 Automation)

adderlogic-gates

I'm reading Chapter 17 of Charles Petzold book Code (which is excellent) and in it he's describing an automated adder which he's adding different Operation Codes or Instruction Codes.

In the diagram, he has an output for an 8 bit latch which says "Code", but it doesn't connect to anything else.

I'm just wondering how does the Op code instruct/tell the adder what to do (add/subtract/jump/halt/etc).

I'm guessing that it must change the control signals for different parts of the adder, but how does it recognize each Op Code?

Is it a lot of AND gates and Inverters? that connect to the control signal inputs of the other parts?

Thanks and by the way, I'm a newbie trying to understand and haven't even got to transistors or chips or anything else yet, so may not understand anything above a layman's explanation! And sorry if this question is a bit basic.

Best Answer

I don't have this book.

The "decoder" transforms opcodes into signals for driving the various execution units (alu, branch, ...) and selecting the registers.

Tranditional RISC CPUs have relatively simple encodings where there are almost fixed fields for selecting the operations. This is far less true in CPUs like x86.

(Example, some MIPS instructions : http://www-inst.eecs.berkeley.edu/~cs150/sp11/checkpoint_1/images/MIPS150ISA.png)

Then, for the arithmetic/logic part, there is not separate adder, subtractor, and, or... blocks selected with multiplexers. Many operation are combined in multipurpose circuits, for example adder/subtractor/negate.