How to clear a 4 bit shift register with no clear input

You should not have a problem using a 16 bit shift register (or two chained 8 bit shift registers similar to the 74HC589A).

There are two ways that you could consider to ignore the unused 6 bits: 1) shift all 16 bits and mask the unused bits in software, or 2) only shift 10 bits across the serial connection.

If you are reading the data using the built-in SPI peripieral on some microcontrollers, you may have to shift in a multiple of 8 bits per word, which would force you into scenario 1. Otherwise, it may be simpler to implement scenario 2.

Most shift registers don't care if you don't shift all the bits... they will happily accept new data on the parallel load clock regardless of how many bits have been shifted. If you only plan to shift 10 bits, make sure to use the bits that will be shifted out of the register first.

In either case, you should tie the unused input pins to your supply rail or ground through a resistor, as floating inputs can cause problems on some ICs.

You neglected to say what part number you are using, which makes other people do unnecessary googling. Is it the 40104/40194?

Anyway, it is not true that you send a pulse to S1 and S0. The values 1 1 should be presented, and take effect on the rising edge of the clock.

If you try to set the inputs to a sequential logic device at exactly the same time as the clock edge, you will get erratic behavior. In general, inputs must already be settled by the time the clock arrives.

For instance, take a look at the timing diagram on page 8 of this datasheet: http://www.datasheetcatalog.org/datasheet/philips/HEF40194BD.pdf

There is a minimum "set up time" and "hold time" before and after the clock edge.