I'm trying to understand how a JTAG connector looks. To successfully interface with a board, are there any alternatives to JTAG?
Will all the pins of the JTAG be clumped together, or can they be spread apart, like in different corners of the board?
I have a complex board I'm looking at, and it has a lot of TP (test points) on the board. Can any of them, together, form a JTAG?
Will there be any marking on the PCB to help identify JTAG?
Best Answer
JTAG is a port like any other (you also wouldn't want to have to connect five different cables to attach a LCD). The layout itself doesn't matter although there are various standards (probably every vendor has its own standard, or two) but since it is possible to also use a high clock frequency (especially on TCK - 25MHz) you might want to route the lines together and not spread them apart with different lengths. If you want to access them via testpoints, why not place these together. Also note that it's usually possible to make a chain of multiple jtag devices. You will need to connect TDO to TDI of the next device and so on. For the JTAG port you will usually have the following pins: TCK, TMS, TDI and TDO. Sometimes you might also want to have a Reset Pin where you can reset your peripherals but this is usually no JTAG requirement. You will have to check your devices if you need a reset. Check the usual suspects for their typical connectors (ARM, Xilinx, Altera). These are pretty well specified and you can buy tools with the appropriate connectors (instead of having to make your own adapters).