The ERC on my schematic keeps on failing due to a Type 3 error (VDD pin of an IC not driven) despite the fact that it does receive power via a voltage regulator and an NPN transistor. See the schematic attached:
Pin #2 is configuread as a +9 V power input. The current flows from the +12 V source in the upper left corner (which is attached to a power flag and input connector) through the DC regulator (U1) and the transistor (which runs a capacity multiplier following an advice I received in this forum; Q1; type BC547C) to the IC (U2A).
Nevertheless, this construction fails in the ERC:
ErrType(3): Pin connected to some others pins but no pin to drive it
@ (80.01 mm, 38.10 mm): Cmp #U2, Pin 2 (power_in) not driven (Net 50).
Why not? Is this because of the transistor, whose emitter is not regarded as a power output?
UPDATE: I do use power flags. See this screenshot:
A look into the library editor revealed that the C and E connectors of Q1 are configured as "passive". May this be the culprit?
Best Answer
Kicad has no idea of your intended usage nor where power comes from. It has ERC rules that check common issues and checking that power-in is driven from something that can provide power is one such use-case.
Some parts have a Power-Out but most of the time you must inform Kicad where the power comes from
You need to add a PWR_FLAG symbol to inform Kicad what nets are capable of providing power
https://docs.kicad.org/master/en/getting_started_in_kicad/getting_started_in_kicad.html#43
Such power flags MUST be on all nets that provide power. It isn't enough to place on the global power flags (+5, +3v3) as sometimes ferrites are used and kicad does not know the intent of a circuit.
Looking at the picture from the OP, U2A.2 (Vdd) is connected to Q1.3 and thus this could be the source of this additional power rail, or is it via the top trace that is going off-screen.
Nets that provide power must be marked as such