Microchip PIC – How to recover the context saved in interrups or disable the automatic saving of the context

I was just writing this answer to your other question but you deleted it. Since this question is related to the other I will post it here as it should answer both:

Setting a pin to input does not set it to any value, the pin itself is floating. This means it looks like a very high impedance to anything that connects to it (like an open circuit)

Another way to explain the difference is with the pin set to an output and logic 0, you could sink up to 20mA or so of current through it, for example to turn on an LED (LED anode connected to Vdd through appropriate resistor, LED cathode connected to pin - to turn on set pin to logic 0, to turn off set to logic 1)
If you do this with the pin set to input, the LED won't light as there is no current path to ground.
The TRIS register only controls the high impedance state, by disconnecting the output driver from the pin:

The high impedance is good for an input, since it means whatever is connected to it can drive the pin high or low easily.

These type of pins are called "tristate" pins, since they can be in three states: high, low, or high impedance ("1", "0" or "Z")

When the pin is set to input, if you want to ensure it is at high or low you can set what is called a "weak pullup" or "weak pulldown" if the microcontroller has this available. This looks like a high resistor connected between Vdd (or ground) and the pin, which pulls it high or low weakly, so something can drive it to another state easily without using too much current (an output connected to an output is a bad idea, and called "bus contention" since the two outputs fight to set the line to their particular state. The line will generally end up in between states, where exactly depends on the relative strength of each driver)

Microchip's website has a document named Using the right Format, Syntax and Definitions for PICmicro Configuration Bits that explains where to find the configuration settings for your particular device.

For example it states for the PIC16F1 devices with a C Compiler:

C Compiler:

Format: Defined in the User Manual Located at: C:\Program Files\HI‐TECH Software\PICC\\docs\

Definition/Syntax: Located in respective product's header file. Use the pic16f1xxx.h header file at: C:\Program Files\HI‐TECH Software\PICC\\include\

If we look in the header file for your particular chip we find:

/
// Configuration mask definitions
//


// Config Register: CONFIG1
#define CONFIG1              0x8007
// Oscillator Selection
// ECH, External Clock, High Power Mode (4-32 MHz): device clock supplied to CLKIN pin
#define FOSC_ECH             0xFFFF
// ECM, External Clock, Medium Power Mode (0.5-4 MHz): device clock supplied to CLKIN pin
#define FOSC_ECM             0xFFFE
// ECL, External Clock, Low Power Mode (0-0.5 MHz): device clock supplied to CLKIN pin
#define FOSC_ECL             0xFFFD
// INTOSC oscillator: I/O function on CLKIN pin
#define FOSC_INTOSC          0xFFFC
// EXTRC oscillator: External RC circuit connected to CLKIN pin
#define FOSC_EXTRC           0xFFFB
// HS Oscillator, High-speed crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_HS              0xFFFA
// XT Oscillator, Crystal/resonator connected between OSC1 and OSC2 pins
#define FOSC_XT              0xFFF9
// LP Oscillator, Low-power crystal connected between OSC1 and OSC2 pins
#define FOSC_LP              0xFFF8
// Watchdog Timer Enable
// WDT enabled
#define WDTE_ON              0xFFFF
// WDT enabled while running and disabled in Sleep
#define WDTE_NSLEEP          0xFFF7
// WDT controlled by the SWDTEN bit in the WDTCON register
#define WDTE_SWDTEN          0xFFEF
// WDT disabled
#define WDTE_OFF             0xFFE7
// Power-up Timer Enable
// PWRT disabled
#define PWRTE_OFF            0xFFFF
// PWRT enabled
#define PWRTE_ON             0xFFDF
// MCLR Pin Function Select
// MCLR/VPP pin function is MCLR
#define MCLRE_ON             0xFFFF
// MCLR/VPP pin function is digital input
#define MCLRE_OFF            0xFFBF
// Flash Program Memory Code Protection
// Program memory code protection is disabled
#define CP_OFF               0xFFFF
// Program memory code protection is enabled
#define CP_ON                0xFF7F
// Data Memory Code Protection
// Data memory code protection is disabled
#define CPD_OFF              0xFFFF
// Data memory code protection is enabled
#define CPD_ON               0xFEFF
// Brown-out Reset Enable
// Brown-out Reset enabled
#define BOREN_ON             0xFFFF
// Brown-out Reset enabled while running and disabled in Sleep
#define BOREN_NSLEEP         0xFDFF
// Brown-out Reset controlled by the SBOREN bit in the BORCON register
#define BOREN_SBODEN         0xFBFF
// Brown-out Reset disabled
#define BOREN_OFF            0xF9FF
// Clock Out Enable
// CLKOUT function is disabled. I/O or oscillator function on the CLKOUT pin
#define CLKOUTEN_OFF         0xFFFF
// CLKOUT function is enabled on the CLKOUT pin
#define CLKOUTEN_ON          0xF7FF
// Internal/External Switchover
// Internal/External Switchover mode is enabled
#define IESO_ON              0xFFFF
// Internal/External Switchover mode is disabled
#define IESO_OFF             0xEFFF
// Fail-Safe Clock Monitor Enable
// Fail-Safe Clock Monitor is enabled
#define FCMEN_ON             0xFFFF
// Fail-Safe Clock Monitor is disabled
#define FCMEN_OFF            0xDFFF


// Config Register: CONFIG2
#define CONFIG2              0x8008
// Flash Memory Self-Write Protection
// Write protection off
#define WRT_OFF              0xFFFF
// 000h to 1FFh write protected, 200h to 1FFFh may be modified by EECON control
#define WRT_BOOT             0xFFFE
// 000h to FFFh write protected, 1000h to 1FFFh may be modified by EECON control
#define WRT_HALF             0xFFFD
// 000h to 1FFFh write protected, no addresses may be modified by EECON control
#define WRT_ALL              0xFFFC
// PLL Enable
// 4x PLL enabled
#define PLLEN_ON             0xFFFF
// 4x PLL disabled
#define PLLEN_OFF            0xFEFF
// Stack Overflow/Underflow Reset Enable
// Stack Overflow or Underflow will cause a Reset
#define STVREN_ON            0xFFFF
// Stack Overflow or Underflow will not cause a Reset
#define STVREN_OFF           0xFDFF
// Brown-out Reset Voltage Selection
// Brown-out Reset Voltage (VBOR) set to 1.9V
#define BORV_LO              0xFFFF
// Brown-out Reset Voltage (VBOR) set to 2.7V
#define BORV_HI              0xFBFF
// Low-Voltage Programming Enable
// Low-voltage programming enabled
#define LVP_ON               0xFFFF
// High-voltage on MCLR/VPP must be used for programming
#define LVP_OFF              0xDFFF

An example in the previously quoted document is:

__CONFIG(FOSC_INTOSC &WDTE_OFF &  PWRTE_OFF & MCLRE_ON& CP_OFF & BOREN_OFF & CLKOUTEN_ON & IESO_OFF & FCMEN_OFF); 
__CONFIG(WRT_OFF & VCAPEN_OFF & PLLEN_OFF & STVREN_OFF & LVP_OFF);

Comparing this with the above header file you can see what each configuration macro will enable/disable.