MIPI DSI/differential pair layout guidance

differentialimpedance-matchingmipi

I have a display sample that I'd like to interface with a Linux SBC, the only issue is that the connector is not compatible. To make it possible to interface the two parts I've designed a PCB, trying to follow guidance on differential pair routing I found in a TI document.

My layout is below. It's a 4 layer PCB with two internal ground planes. I've used 7 mil trace width with 5 mil spacing, top and bottom layers (35um copper) are 0.2mm from the ground plane below. With all these things taken into account I believe I have a 90ohm differential impedance.

The overall distance between the two connectors is about 800mils. Unfortuantely I was unable to avoid vias due to the connector pin layout.

This is my first multi-differential pair layout, so I could really use some feedback. Is this design sufficient to work for MIPI DSI?

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Best Answer

It's a 4 layer PCB with two internal ground planes.

It's not a rule but generally, the outer layers are kept for signal lines and the internal layers are kept for power lines, one for positive (VCC, VDD or whatever) and the other one for GND. Using two GND layers on top of each other can make the impedance control a bit more complicated Someone please correct me if I'm wrong.

I've used 7 mil trace width with 5 mil spacing, top and bottom layers (35um copper) are 0.2mm from the ground plane below. With all these things taken into account I believe I have a 90ohm differential impedance.

The differential impedance of MIPI tracks should be 100 Ohms, not 90 (USB requires 90). Using this calculator, I found 100 Ohms by giving 9 mils of track width, 5 mils of track separation, 8 mils of dielectric (prepregs usually have a dielectric constant of 3.5 to 4.5 and I took 3.5) and 1.4mils/35um of copper thickness. Remember that you can't hit 100.0 Ohms in practice so I personally give a 5% tolerance.

And also, it's always good to have each pair the same length.