I have a 4 layer board, with Power and Ground being the inner planes.
I have a component which connects to the netlist AVDD
The power plane has:
Net: AVDD=POWER
Layer/Colour: Power
Boundary: Default
Relief: RELIEF
Type: Solid
Clearance: 10th
With boxes Relieve Pins and Supress islands both checked
I connect a via between top copper (component side) and Power:
From: Top Copper
To: POWER
Style: DEFAULT
Net: NONE
This via does not connect to the AVDD on my component – why?
Best Answer
Seems that the via gets its net from the component it is connected to, so the track comes first and the via to link to the pwr/gnd must come after that. Putting a via in first does not work, although putting a lone pad, and editing it, does.