This sounds like your bias point circuit is moving or is being excited by the input waveform. An AC analysis does an operating point analysis then uses those biases to do a small signal sweep (that's why it is so fast). A transient analysis of course recomputes the bias as the signal changes. The fact that running different transient analysis with different stimulations gives differing results is a big clue that your operating point is shifting as well.
ltspice (or any simulator really) is only an approximation to both, reality and ideal components. Reality because it can not model all the details reality depends upon, and ideal because it can not run with infinite precision in values and time.
Basically how any spice works is that for the next timestep it checks all involved complex formulas and matrices, and if they converge within the required number of iterations into values with error tolerances below those specified with the *tol options, then it will go on. If not, it will lower the timestep and try again, until it either reaches a limit and errors out, or the tolerance is met.
reltol is the paramter used to specify a certain accepted error relative to the next timestep. The error is estimated using a polynomial to "predict" the value at the next chosen timestep, then it is actually computed there, and the difference taken. If its too big, make the timestep smaller.
This also means that instead of those parameters, you can make the simulation more accurate by forcing a really small timestep like 1n but that makes things really really slow, the dynamic timestep feature is one of the things that make it much faster.
Together with trtol (which specifies a factor on overestimation of the actual error) these are the major knobs you want to play with to either make the simulation more accurate, or faster.
Additionally, ltspice internally uses floats, so sometimes .opt numdgt=7 (anything over 6) is needed to force it to use doubles instead, which may or may not make things more accurate.
Best Answer
Here is an additional tweak that will help ensure stability.
The output in my simulation above is more-or-less accurate if V3 is current-limited. In reality U2 will be destroyed if V3 is too low in source impedance.
You should limit the input voltage to U2 to >= 0V. If it goes negative by more than a few hundred mV and the current is limited you'll see the phase reversal in my simulation, and if it's not limited you'll probably damage the chip.