Verilog: Using a counter module to switch outputs

So I'm pretty new to Verilog and am working on a 3 bit multiplier project that outputs the decimal solution of the multiplier to the 7 segment display on my fpga board. I'm having a problem with conceptualizing how exactly my counter module that was given to me would allow me to switch in between inputs. The counter looks likes this:

module counter (
input clk,
output [1:0]Y
);

reg [24:0] counter;

always @ (posedge clk) 
begin
counter <= counter + 1;
end

assign Y[1] = counter[24];
assign Y[0] = counter[23];

endmodule

I feel like I either need to use a 2:1 mux or a latch. I've started my code and it looks like this:

module cath_mux(
input clk,
input [3:0]ones,
input [3:0]tens,
output [3:0] disp
);

reg [3:0] disp;
wire [1:0] Y;

counter count(.clk(clk), .Y(Y));

always @ (Y)
begin
case (Y)


endmodule   

I'm just not sure how to set up my case statements since there would be 4 cases with a 2 bit array for Y. The inputs come from a BCD decoder and the output would go to a module that will change my cathode values based on my BCD digit fed into it from the output of this module. I also need to figure out how to use the counter module to switch between active anodes on my board too.

This question seemed similar but I'm not sure how it applies to my question.

https://electronics.stackexchange.com/questions/165609/verilog-for-4-bit-wide-21-parameterized-mux-output-needs-to-be-decoded-to-7-se

Our logic circuits professor has been gone for two weeks and no one in our class has been able to really figure this out. Any suggestions or help would be really appreciated!