Voltage\current sources

First, \$v_{in}\$ is an AC signal voltage while \$V_{GS}\$ is a DC bias voltage. These are treated separately.

From a small-signal perspective, the current source (lower FET) is effectively an open circuit so there is effectively no voltage division for the AC signal. This is why \$v_{in}\$ appears at the output node unattenuated (assuming the output node is connected to an effectively open circuit).

From a DC bias perspective, the gate of the top FET is at (presumably) zero volts so the source, which must be more positive than the gate, must be at 2.8V (using the values in the book and assuming the FETs are identical).

However, note that this is not \$V_{GS}\$ since, in fact, \$V_{GS}\$ for both FETs is -2.8V. In other words, the voltage at the source of the top FET is $$v_{in} - V_{GS}$$

There is an unstated assumption that the circuit is linear. It's easy to devise a nonlinear circuit that would look the same to any real value of resistor but fail when certain voltage sources were connected. Think of a series battery + resistor with a reverse-biased diode across the terminals.

Since the circuit is linear, the superposition theorem applies. That (and the uniqueness theorem) is adequate to prove Thevenin's theorem. It also applies more generally with resistors replaced by impedances.

Since it's linear it only has to behave the same with two values of resistor attached to be identical for all possible applied voltages to the two terminals (ignoring the degenerate case where the voltage is zero for both resistor values).