I have a direct mapped cache of size S with the line size L. The cache is physically indexed and tagged. The physical address is 50 bits, numbered from 0 to 49 (with 0 being the least significant bit). The machine has a word size of 4 bits and the memory is byte-addressable. Which bits of the 50 bits are used to select a word from the line? Is it as many bits as it takes to point of a word in the line size L e.g. if line size is 8 byte then 2 bits are needed? Is it some logarithm again that must be used?
What are the bits for this cache
cache
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Best Answer
Assuming you meant to say "The machine has a word size of 4 bytes" (instead of "bits"), then yes you are correct - the log2 of the number of words in a line. Since there are 4 bytes per word, the bottom 2 address bits (addr[1 : 0]) are used to select which byte of a word, and then next bits after that (addr[log2(L)-1 : 2]) are to select which word in the line. This assumes line size is L bytes, not L bits (if L is in bits, then first divide L by 8).