Designing state machine for Jk FF Counter

This looks like a homework question, which I won't answer. But here are some pointers:

• You cannot represent more states than what you have available -> that means that you will have to go to the next higher state (i.e. 2 FF's for 4 states) or use only one FF per state. (i.e. FF #1 correlates directly to A).

• option #1 ( 2 FF's and 4 states) is more economical but you have to make sure that the unused state does n't not get activated and then locks out.

  • you might draw this as a 4th state "D" with loops back to itself.
  • what is generally considered safe design is that you always have explicit transitions AWAY from the unused state in case it gets activated.

• option #2 uses more FF's but cannot have any hidden states.

  • it is inherently safer.
  • it is known as a "one hot" design and thermometer codes are examples of this.

Your choice of states "A = 00" etc. will make the design simpler or more complicated. SO may want to go with what you decribe or you may want to go with state C = "10". You should look at all possibilities.

The first SM, only uses 0 or 1 as an input because it only has one input variable. They should have used a variable for clarity anyways. You'll notice in the table that it is marked as "x" but not in the diagram.

The key thing is to treat each bit individually.

For example, for the low-order bit, lets call it next_state[0].

state     | next_state[0]
---------------
   000    | 0
   001    | 0
   010    | 1
   011    | X
   100    | 0
   101    | 0
   110    | 0
   111    | 1

So you can write

next_state[0] = state[0] & state[1] & state[2] | ~state[0] & state[1] & ~state[2]

If you are building this with discrete logic you could simplify this to

next_state[0] = state[1] & (state[0] & state[2] | ~state[0] & ~state[2])

And you have an equation you can use to drive the flip-flop that will generate the next condition for the low-bit of the state variable.

Finding the equations for the other two state bits works the same way.